162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Cadence I2C controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Michal Simek <michal.simek@amd.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ciallOf:
1362306a36Sopenharmony_ci  - $ref: /schemas/i2c/i2c-controller.yaml#
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciproperties:
1662306a36Sopenharmony_ci  compatible:
1762306a36Sopenharmony_ci    enum:
1862306a36Sopenharmony_ci      - cdns,i2c-r1p10 # cadence i2c controller version 1.0
1962306a36Sopenharmony_ci      - cdns,i2c-r1p14 # cadence i2c controller version 1.4
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci  reg:
2262306a36Sopenharmony_ci    maxItems: 1
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci  clocks:
2562306a36Sopenharmony_ci    minItems: 1
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  resets:
2862306a36Sopenharmony_ci    maxItems: 1
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  interrupts:
3162306a36Sopenharmony_ci    maxItems: 1
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci  clock-frequency:
3462306a36Sopenharmony_ci    minimum: 1
3562306a36Sopenharmony_ci    maximum: 400000
3662306a36Sopenharmony_ci    description: |
3762306a36Sopenharmony_ci      Desired operating frequency, in Hz, of the bus.
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  clock-name:
4062306a36Sopenharmony_ci    const: pclk
4162306a36Sopenharmony_ci    description: |
4262306a36Sopenharmony_ci      Input clock name.
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  fifo-depth:
4562306a36Sopenharmony_ci    description:
4662306a36Sopenharmony_ci      Size of the data FIFO in bytes.
4762306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
4862306a36Sopenharmony_ci    default: 16
4962306a36Sopenharmony_ci    enum: [2, 4, 8, 16, 32, 64, 128, 256]
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci  power-domains:
5262306a36Sopenharmony_ci    maxItems: 1
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_cirequired:
5562306a36Sopenharmony_ci  - compatible
5662306a36Sopenharmony_ci  - reg
5762306a36Sopenharmony_ci  - clocks
5862306a36Sopenharmony_ci  - interrupts
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ciunevaluatedProperties: false
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ciexamples:
6362306a36Sopenharmony_ci  - |
6462306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
6562306a36Sopenharmony_ci    i2c@e0004000 {
6662306a36Sopenharmony_ci        compatible = "cdns,i2c-r1p10";
6762306a36Sopenharmony_ci        clocks = <&clkc 38>;
6862306a36Sopenharmony_ci        resets = <&rstc 288>;
6962306a36Sopenharmony_ci        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
7062306a36Sopenharmony_ci        reg = <0xe0004000 0x1000>;
7162306a36Sopenharmony_ci        clock-frequency = <400000>;
7262306a36Sopenharmony_ci        #address-cells = <1>;
7362306a36Sopenharmony_ci        #size-cells = <0>;
7462306a36Sopenharmony_ci        fifo-depth = <8>;
7562306a36Sopenharmony_ci    };
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