162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: NVIDIA Tegra234 NVDEC 862306a36Sopenharmony_ci 962306a36Sopenharmony_cidescription: | 1062306a36Sopenharmony_ci NVDEC is the hardware video decoder present on NVIDIA Tegra210 1162306a36Sopenharmony_ci and newer chips. It is located on the Host1x bus and typically 1262306a36Sopenharmony_ci programmed through Host1x channels. 1362306a36Sopenharmony_ci 1462306a36Sopenharmony_cimaintainers: 1562306a36Sopenharmony_ci - Thierry Reding <treding@gmail.com> 1662306a36Sopenharmony_ci - Mikko Perttunen <mperttunen@nvidia.com> 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ciproperties: 1962306a36Sopenharmony_ci $nodename: 2062306a36Sopenharmony_ci pattern: "^nvdec@[0-9a-f]*$" 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci compatible: 2362306a36Sopenharmony_ci enum: 2462306a36Sopenharmony_ci - nvidia,tegra234-nvdec 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci reg: 2762306a36Sopenharmony_ci maxItems: 1 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci clocks: 3062306a36Sopenharmony_ci maxItems: 3 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci clock-names: 3362306a36Sopenharmony_ci items: 3462306a36Sopenharmony_ci - const: nvdec 3562306a36Sopenharmony_ci - const: fuse 3662306a36Sopenharmony_ci - const: tsec_pka 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci resets: 3962306a36Sopenharmony_ci maxItems: 1 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci reset-names: 4262306a36Sopenharmony_ci items: 4362306a36Sopenharmony_ci - const: nvdec 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci power-domains: 4662306a36Sopenharmony_ci maxItems: 1 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci iommus: 4962306a36Sopenharmony_ci maxItems: 1 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci dma-coherent: true 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci interconnects: 5462306a36Sopenharmony_ci items: 5562306a36Sopenharmony_ci - description: DMA read memory client 5662306a36Sopenharmony_ci - description: DMA write memory client 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci interconnect-names: 5962306a36Sopenharmony_ci items: 6062306a36Sopenharmony_ci - const: dma-mem 6162306a36Sopenharmony_ci - const: write 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci nvidia,memory-controller: 6462306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle 6562306a36Sopenharmony_ci description: 6662306a36Sopenharmony_ci phandle to the memory controller for determining information for the NVDEC 6762306a36Sopenharmony_ci firmware secure carveout. This carveout is configured by the bootloader and 6862306a36Sopenharmony_ci not accessible to CPU. 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci nvidia,bl-manifest-offset: 7162306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 7262306a36Sopenharmony_ci description: 7362306a36Sopenharmony_ci Offset to bootloader manifest from beginning of firmware that was configured by 7462306a36Sopenharmony_ci the bootloader. 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci nvidia,bl-code-offset: 7762306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 7862306a36Sopenharmony_ci description: 7962306a36Sopenharmony_ci Offset to bootloader code section from beginning of firmware that was configured by 8062306a36Sopenharmony_ci the bootloader. 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci nvidia,bl-data-offset: 8362306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 8462306a36Sopenharmony_ci description: 8562306a36Sopenharmony_ci Offset to bootloader data section from beginning of firmware that was configured by 8662306a36Sopenharmony_ci the bootloader. 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci nvidia,os-manifest-offset: 8962306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 9062306a36Sopenharmony_ci description: 9162306a36Sopenharmony_ci Offset to operating system manifest from beginning of firmware that was configured by 9262306a36Sopenharmony_ci the bootloader. 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_ci nvidia,os-code-offset: 9562306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 9662306a36Sopenharmony_ci description: 9762306a36Sopenharmony_ci Offset to operating system code section from beginning of firmware that was configured by 9862306a36Sopenharmony_ci the bootloader. 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ci nvidia,os-data-offset: 10162306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 10262306a36Sopenharmony_ci description: 10362306a36Sopenharmony_ci Offset to operating system data section from beginning of firmware that was configured 10462306a36Sopenharmony_ci by the bootloader. 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_cirequired: 10762306a36Sopenharmony_ci - compatible 10862306a36Sopenharmony_ci - reg 10962306a36Sopenharmony_ci - clocks 11062306a36Sopenharmony_ci - clock-names 11162306a36Sopenharmony_ci - resets 11262306a36Sopenharmony_ci - reset-names 11362306a36Sopenharmony_ci - power-domains 11462306a36Sopenharmony_ci - nvidia,memory-controller 11562306a36Sopenharmony_ci - nvidia,bl-manifest-offset 11662306a36Sopenharmony_ci - nvidia,bl-code-offset 11762306a36Sopenharmony_ci - nvidia,bl-data-offset 11862306a36Sopenharmony_ci - nvidia,os-manifest-offset 11962306a36Sopenharmony_ci - nvidia,os-code-offset 12062306a36Sopenharmony_ci - nvidia,os-data-offset 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ciadditionalProperties: false 12362306a36Sopenharmony_ci 12462306a36Sopenharmony_ciexamples: 12562306a36Sopenharmony_ci - | 12662306a36Sopenharmony_ci #include <dt-bindings/clock/tegra234-clock.h> 12762306a36Sopenharmony_ci #include <dt-bindings/memory/tegra234-mc.h> 12862306a36Sopenharmony_ci #include <dt-bindings/power/tegra234-powergate.h> 12962306a36Sopenharmony_ci #include <dt-bindings/reset/tegra234-reset.h> 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci nvdec@15480000 { 13262306a36Sopenharmony_ci compatible = "nvidia,tegra234-nvdec"; 13362306a36Sopenharmony_ci reg = <0x15480000 0x00040000>; 13462306a36Sopenharmony_ci clocks = <&bpmp TEGRA234_CLK_NVDEC>, 13562306a36Sopenharmony_ci <&bpmp TEGRA234_CLK_FUSE>, 13662306a36Sopenharmony_ci <&bpmp TEGRA234_CLK_TSEC_PKA>; 13762306a36Sopenharmony_ci clock-names = "nvdec", "fuse", "tsec_pka"; 13862306a36Sopenharmony_ci resets = <&bpmp TEGRA234_RESET_NVDEC>; 13962306a36Sopenharmony_ci reset-names = "nvdec"; 14062306a36Sopenharmony_ci power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>; 14162306a36Sopenharmony_ci interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDECSRD &emc>, 14262306a36Sopenharmony_ci <&mc TEGRA234_MEMORY_CLIENT_NVDECSWR &emc>; 14362306a36Sopenharmony_ci interconnect-names = "dma-mem", "write"; 14462306a36Sopenharmony_ci iommus = <&smmu_niso1 TEGRA234_SID_NVDEC>; 14562306a36Sopenharmony_ci dma-coherent; 14662306a36Sopenharmony_ci 14762306a36Sopenharmony_ci nvidia,memory-controller = <&mc>; 14862306a36Sopenharmony_ci 14962306a36Sopenharmony_ci /* Placeholder values, to be replaced with values from overlay */ 15062306a36Sopenharmony_ci nvidia,bl-manifest-offset = <0>; 15162306a36Sopenharmony_ci nvidia,bl-data-offset = <0>; 15262306a36Sopenharmony_ci nvidia,bl-code-offset = <0>; 15362306a36Sopenharmony_ci nvidia,os-manifest-offset = <0>; 15462306a36Sopenharmony_ci nvidia,os-data-offset = <0>; 15562306a36Sopenharmony_ci nvidia,os-code-offset = <0>; 15662306a36Sopenharmony_ci }; 157