162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: ZynqMP Mode Pin GPIO controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cidescription:
1062306a36Sopenharmony_ci  PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin
1162306a36Sopenharmony_ci  GPIO controller with configurable from numbers of pins (from 0 to 3 per
1262306a36Sopenharmony_ci  PS_MODE). Every pin can be configured as input/output.
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_cimaintainers:
1562306a36Sopenharmony_ci  - Piyush Mehta <piyush.mehta@amd.com>
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciproperties:
1862306a36Sopenharmony_ci  compatible:
1962306a36Sopenharmony_ci    const: xlnx,zynqmp-gpio-modepin
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ci  gpio-controller: true
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  "#gpio-cells":
2462306a36Sopenharmony_ci    const: 2
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_cirequired:
2762306a36Sopenharmony_ci  - compatible
2862306a36Sopenharmony_ci  - gpio-controller
2962306a36Sopenharmony_ci  - "#gpio-cells"
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ciadditionalProperties: false
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ciexamples:
3462306a36Sopenharmony_ci  - |
3562306a36Sopenharmony_ci    zynqmp-firmware {
3662306a36Sopenharmony_ci        gpio {
3762306a36Sopenharmony_ci            compatible = "xlnx,zynqmp-gpio-modepin";
3862306a36Sopenharmony_ci            gpio-controller;
3962306a36Sopenharmony_ci            #gpio-cells = <2>;
4062306a36Sopenharmony_ci        };
4162306a36Sopenharmony_ci    };
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci...
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