162306a36Sopenharmony_ciGPIO controller on CE4100 / Sodaville SoCs 262306a36Sopenharmony_ci========================================== 362306a36Sopenharmony_ci 462306a36Sopenharmony_ciThe bindings for CE4100's GPIO controller match the generic description 562306a36Sopenharmony_ciwhich is covered by the gpio.txt file in this folder. 662306a36Sopenharmony_ci 762306a36Sopenharmony_ciThe only additional property is the intel,muxctl property which holds the 862306a36Sopenharmony_civalue which is written into the MUXCNTL register. 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ciThere is no compatible property for now because the driver is probed via 1162306a36Sopenharmony_ciPCI id (vendor 0x8086 device 0x2e67). 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ciThe interrupt specifier consists of two cells encoded as follows: 1462306a36Sopenharmony_ci - <1st cell>: The interrupt-number that identifies the interrupt source. 1562306a36Sopenharmony_ci - <2nd cell>: The level-sense information, encoded as follows: 1662306a36Sopenharmony_ci 4 - active high level-sensitive 1762306a36Sopenharmony_ci 8 - active low level-sensitive 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciExample of the GPIO device and one user: 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci pcigpio: gpio@b,1 { 2262306a36Sopenharmony_ci /* two cells for GPIO and interrupt */ 2362306a36Sopenharmony_ci #gpio-cells = <2>; 2462306a36Sopenharmony_ci #interrupt-cells = <2>; 2562306a36Sopenharmony_ci compatible = "pci8086,2e67.2", 2662306a36Sopenharmony_ci "pci8086,2e67", 2762306a36Sopenharmony_ci "pciclassff0000", 2862306a36Sopenharmony_ci "pciclassff00"; 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci reg = <0x15900 0x0 0x0 0x0 0x0>; 3162306a36Sopenharmony_ci /* Interrupt line of the gpio device */ 3262306a36Sopenharmony_ci interrupts = <15 1>; 3362306a36Sopenharmony_ci /* It is an interrupt and GPIO controller itself */ 3462306a36Sopenharmony_ci interrupt-controller; 3562306a36Sopenharmony_ci gpio-controller; 3662306a36Sopenharmony_ci intel,muxctl = <0>; 3762306a36Sopenharmony_ci }; 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci testuser@20 { 4062306a36Sopenharmony_ci compatible = "example,testuser"; 4162306a36Sopenharmony_ci /* User the 11th GPIO line as an active high triggered 4262306a36Sopenharmony_ci * level interrupt 4362306a36Sopenharmony_ci */ 4462306a36Sopenharmony_ci interrupts = <11 8>; 4562306a36Sopenharmony_ci interrupt-parent = <&pcigpio>; 4662306a36Sopenharmony_ci /* Use this GPIO also with the gpio functions */ 4762306a36Sopenharmony_ci gpios = <&pcigpio 11 0>; 4862306a36Sopenharmony_ci }; 49