162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Rockchip GPIO bank 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Heiko Stuebner <heiko@sntech.de> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ciproperties: 1362306a36Sopenharmony_ci compatible: 1462306a36Sopenharmony_ci enum: 1562306a36Sopenharmony_ci - rockchip,gpio-bank 1662306a36Sopenharmony_ci - rockchip,rk3188-gpio-bank0 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ci reg: 1962306a36Sopenharmony_ci maxItems: 1 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci interrupts: 2262306a36Sopenharmony_ci maxItems: 1 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci clocks: 2562306a36Sopenharmony_ci minItems: 1 2662306a36Sopenharmony_ci items: 2762306a36Sopenharmony_ci - description: APB interface clock source 2862306a36Sopenharmony_ci - description: GPIO debounce reference clock source 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci gpio-ranges: true 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci gpio-controller: true 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci gpio-line-names: true 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci "#gpio-cells": 3762306a36Sopenharmony_ci const: 2 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci interrupt-controller: true 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci "#interrupt-cells": 4262306a36Sopenharmony_ci const: 2 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_cirequired: 4562306a36Sopenharmony_ci - compatible 4662306a36Sopenharmony_ci - reg 4762306a36Sopenharmony_ci - interrupts 4862306a36Sopenharmony_ci - clocks 4962306a36Sopenharmony_ci - gpio-controller 5062306a36Sopenharmony_ci - "#gpio-cells" 5162306a36Sopenharmony_ci - interrupt-controller 5262306a36Sopenharmony_ci - "#interrupt-cells" 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ciadditionalProperties: false 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ciexamples: 5762306a36Sopenharmony_ci - | 5862306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 5962306a36Sopenharmony_ci pinctrl: pinctrl { 6062306a36Sopenharmony_ci #address-cells = <1>; 6162306a36Sopenharmony_ci #size-cells = <1>; 6262306a36Sopenharmony_ci ranges; 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci gpio0: gpio@2000a000 { 6562306a36Sopenharmony_ci compatible = "rockchip,rk3188-gpio-bank0"; 6662306a36Sopenharmony_ci reg = <0x2000a000 0x100>; 6762306a36Sopenharmony_ci interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 6862306a36Sopenharmony_ci clocks = <&clk_gates8 9>; 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci gpio-controller; 7162306a36Sopenharmony_ci #gpio-cells = <2>; 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci interrupt-controller; 7462306a36Sopenharmony_ci #interrupt-cells = <2>; 7562306a36Sopenharmony_ci }; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ci gpio1: gpio@2003c000 { 7862306a36Sopenharmony_ci compatible = "rockchip,gpio-bank"; 7962306a36Sopenharmony_ci reg = <0x2003c000 0x100>; 8062306a36Sopenharmony_ci interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 8162306a36Sopenharmony_ci clocks = <&clk_gates8 10>; 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci gpio-controller; 8462306a36Sopenharmony_ci #gpio-cells = <2>; 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci interrupt-controller; 8762306a36Sopenharmony_ci #interrupt-cells = <2>; 8862306a36Sopenharmony_ci }; 8962306a36Sopenharmony_ci }; 90