162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: PCF857x-compatible I/O expanders
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription:
1362306a36Sopenharmony_ci  The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
1462306a36Sopenharmony_ci  driven high by a pull-up current source or driven low to ground. This
1562306a36Sopenharmony_ci  combines the direction and output level into a single bit per line, which
1662306a36Sopenharmony_ci  can't be read back. We can't actually know at initialization time whether a
1762306a36Sopenharmony_ci  line is configured (a) as output and driving the signal low/high, or (b) as
1862306a36Sopenharmony_ci  input and reporting a low/high value, without knowing the last value written
1962306a36Sopenharmony_ci  since the chip came out of reset (if any). The only reliable solution for
2062306a36Sopenharmony_ci  setting up line direction is thus to do it explicitly.
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciproperties:
2362306a36Sopenharmony_ci  compatible:
2462306a36Sopenharmony_ci    enum:
2562306a36Sopenharmony_ci      - maxim,max7328
2662306a36Sopenharmony_ci      - maxim,max7329
2762306a36Sopenharmony_ci      - nxp,pca8574
2862306a36Sopenharmony_ci      - nxp,pca8575
2962306a36Sopenharmony_ci      - nxp,pca9670
3062306a36Sopenharmony_ci      - nxp,pca9671
3162306a36Sopenharmony_ci      - nxp,pca9672
3262306a36Sopenharmony_ci      - nxp,pca9673
3362306a36Sopenharmony_ci      - nxp,pca9674
3462306a36Sopenharmony_ci      - nxp,pca9675
3562306a36Sopenharmony_ci      - nxp,pcf8574
3662306a36Sopenharmony_ci      - nxp,pcf8574a
3762306a36Sopenharmony_ci      - nxp,pcf8575
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  reg:
4062306a36Sopenharmony_ci    maxItems: 1
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci  gpio-line-names:
4362306a36Sopenharmony_ci    minItems: 1
4462306a36Sopenharmony_ci    maxItems: 16
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci  gpio-controller: true
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci  '#gpio-cells':
4962306a36Sopenharmony_ci    const: 2
5062306a36Sopenharmony_ci    description:
5162306a36Sopenharmony_ci      The first cell is the GPIO number and the second cell specifies GPIO
5262306a36Sopenharmony_ci      flags, as defined in <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH
5362306a36Sopenharmony_ci      and GPIO_ACTIVE_LOW flags are supported.
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ci  lines-initial-states:
5662306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32
5762306a36Sopenharmony_ci    description:
5862306a36Sopenharmony_ci      Bitmask that specifies the initial state of each line.
5962306a36Sopenharmony_ci      When a bit is set to zero, the corresponding line will be initialized to
6062306a36Sopenharmony_ci      the input (pulled-up) state.
6162306a36Sopenharmony_ci      When the  bit is set to one, the line will be initialized to the
6262306a36Sopenharmony_ci      low-level output state.
6362306a36Sopenharmony_ci      If the property is not specified all lines will be initialized to the
6462306a36Sopenharmony_ci      input state.
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci  interrupts:
6762306a36Sopenharmony_ci    maxItems: 1
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci  interrupt-controller: true
7062306a36Sopenharmony_ci
7162306a36Sopenharmony_ci  '#interrupt-cells':
7262306a36Sopenharmony_ci    const: 2
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci  wakeup-source: true
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_cipatternProperties:
7762306a36Sopenharmony_ci  "^(.+-hog(-[0-9]+)?)$":
7862306a36Sopenharmony_ci    type: object
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci    required:
8162306a36Sopenharmony_ci      - gpio-hog
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_cirequired:
8462306a36Sopenharmony_ci  - compatible
8562306a36Sopenharmony_ci  - reg
8662306a36Sopenharmony_ci  - gpio-controller
8762306a36Sopenharmony_ci  - '#gpio-cells'
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ciadditionalProperties: false
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ciexamples:
9262306a36Sopenharmony_ci  - |
9362306a36Sopenharmony_ci    i2c {
9462306a36Sopenharmony_ci            #address-cells = <1>;
9562306a36Sopenharmony_ci            #size-cells = <0>;
9662306a36Sopenharmony_ci
9762306a36Sopenharmony_ci            pcf8575: gpio@20 {
9862306a36Sopenharmony_ci                    compatible = "nxp,pcf8575";
9962306a36Sopenharmony_ci                    reg = <0x20>;
10062306a36Sopenharmony_ci                    interrupt-parent = <&irqpin2>;
10162306a36Sopenharmony_ci                    interrupts = <3 0>;
10262306a36Sopenharmony_ci                    gpio-controller;
10362306a36Sopenharmony_ci                    #gpio-cells = <2>;
10462306a36Sopenharmony_ci                    interrupt-controller;
10562306a36Sopenharmony_ci                    #interrupt-cells = <2>;
10662306a36Sopenharmony_ci            };
10762306a36Sopenharmony_ci    };
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