162306a36Sopenharmony_ci* Atmel GPIO controller (PIO)
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciRequired properties:
462306a36Sopenharmony_ci- compatible: "atmel,<chip>-gpio", where <chip> is at91rm9200 or at91sam9x5.
562306a36Sopenharmony_ci- reg: Should contain GPIO controller registers location and length
662306a36Sopenharmony_ci- interrupts: Should be the port interrupt shared by all the pins.
762306a36Sopenharmony_ci- #gpio-cells: Should be two.  The first cell is the pin number and
862306a36Sopenharmony_ci  the second cell is used to specify optional parameters to declare if the GPIO
962306a36Sopenharmony_ci  is active high or low. See gpio.txt.
1062306a36Sopenharmony_ci- gpio-controller: Marks the device node as a GPIO controller.
1162306a36Sopenharmony_ci- interrupt-controller: Marks the device node as an interrupt controller.
1262306a36Sopenharmony_ci- #interrupt-cells: Should be two. The first cell is the pin number and the
1362306a36Sopenharmony_ci  second cell is used to specify irq type flags, see the two cell description
1462306a36Sopenharmony_ci  in interrupt-controller/interrupts.txt for details.
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_cioptional properties:
1762306a36Sopenharmony_ci- #gpio-lines: Number of gpio if absent 32.
1862306a36Sopenharmony_ci
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2062306a36Sopenharmony_ciExample:
2162306a36Sopenharmony_ci	pioA: gpio@fffff200 {
2262306a36Sopenharmony_ci		compatible = "atmel,at91rm9200-gpio";
2362306a36Sopenharmony_ci		reg = <0xfffff200 0x100>;
2462306a36Sopenharmony_ci		interrupts = <2 4>;
2562306a36Sopenharmony_ci		#gpio-cells = <2>;
2662306a36Sopenharmony_ci		gpio-controller;
2762306a36Sopenharmony_ci		#gpio-lines = <19>;
2862306a36Sopenharmony_ci		interrupt-controller;
2962306a36Sopenharmony_ci		#interrupt-cells = <2>;
3062306a36Sopenharmony_ci	};
3162306a36Sopenharmony_ci
32