162306a36Sopenharmony_ci* Freescale MPC512x/MPC8xxx/QorIQ/Layerscape GPIO controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci- compatible : Should be "fsl,<soc>-gpio" 562306a36Sopenharmony_ci The following <soc>s are known to be supported: 662306a36Sopenharmony_ci mpc5121, mpc5125, mpc8349, mpc8572, mpc8610, pq3, qoriq, 762306a36Sopenharmony_ci ls1021a, ls1043a, ls2080a, ls1028a, ls1088a. 862306a36Sopenharmony_ci- reg : Address and length of the register set for the device 962306a36Sopenharmony_ci- interrupts : Should be the port interrupt shared by all 32 pins. 1062306a36Sopenharmony_ci- #gpio-cells : Should be two. The first cell is the pin number and 1162306a36Sopenharmony_ci the second cell is used to specify the gpio polarity: 1262306a36Sopenharmony_ci 0 = active high 1362306a36Sopenharmony_ci 1 = active low 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciOptional properties: 1662306a36Sopenharmony_ci- little-endian : GPIO registers are used as little endian. If not 1762306a36Sopenharmony_ci present registers are used as big endian by default. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciExample of gpio-controller node for a mpc5125 SoC: 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_cigpio0: gpio@1100 { 2262306a36Sopenharmony_ci compatible = "fsl,mpc5125-gpio"; 2362306a36Sopenharmony_ci #gpio-cells = <2>; 2462306a36Sopenharmony_ci reg = <0x1100 0x080>; 2562306a36Sopenharmony_ci interrupts = <78 0x8>; 2662306a36Sopenharmony_ci}; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ciExample of gpio-controller node for a ls2080a SoC: 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_cigpio0: gpio@2300000 { 3162306a36Sopenharmony_ci compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; 3262306a36Sopenharmony_ci reg = <0x0 0x2300000 0x0 0x10000>; 3362306a36Sopenharmony_ci interrupts = <0 36 0x4>; /* Level high type */ 3462306a36Sopenharmony_ci gpio-controller; 3562306a36Sopenharmony_ci little-endian; 3662306a36Sopenharmony_ci #gpio-cells = <2>; 3762306a36Sopenharmony_ci interrupt-controller; 3862306a36Sopenharmony_ci #interrupt-cells = <2>; 3962306a36Sopenharmony_ci}; 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ciExample of gpio-controller node for a ls1028a/ls1088a SoC: 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_cigpio1: gpio@2300000 { 4562306a36Sopenharmony_ci compatible = "fsl,ls1028a-gpio", "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; 4662306a36Sopenharmony_ci reg = <0x0 0x2300000 0x0 0x10000>; 4762306a36Sopenharmony_ci interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 4862306a36Sopenharmony_ci gpio-controller; 4962306a36Sopenharmony_ci #gpio-cells = <2>; 5062306a36Sopenharmony_ci interrupt-controller; 5162306a36Sopenharmony_ci #interrupt-cells = <2>; 5262306a36Sopenharmony_ci little-endian; 5362306a36Sopenharmony_ci}; 54