162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Generic MMIO GPIO
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Linus Walleij <linus.walleij@linaro.org>
1162306a36Sopenharmony_ci  - Bartosz Golaszewski <brgl@bgdev.pl>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cidescription:
1462306a36Sopenharmony_ci  Some simple GPIO controllers may consist of a single data register or a pair
1562306a36Sopenharmony_ci  of set/clear-bit registers. Such controllers are common for glue logic in
1662306a36Sopenharmony_ci  FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped
1762306a36Sopenharmony_ci  NAND-style parallel busses.
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ciproperties:
2062306a36Sopenharmony_ci  compatible:
2162306a36Sopenharmony_ci    enum:
2262306a36Sopenharmony_ci      - brcm,bcm6345-gpio
2362306a36Sopenharmony_ci      - ni,169445-nand-gpio
2462306a36Sopenharmony_ci      - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller
2562306a36Sopenharmony_ci
2662306a36Sopenharmony_ci  big-endian: true
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci  '#gpio-cells':
2962306a36Sopenharmony_ci    const: 2
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  gpio-controller: true
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci  little-endian: true
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ci  reg:
3662306a36Sopenharmony_ci    minItems: 1
3762306a36Sopenharmony_ci    description:
3862306a36Sopenharmony_ci      A list of registers in the controller. The width of each register is
3962306a36Sopenharmony_ci      determined by its size. All registers must have the same width. The number
4062306a36Sopenharmony_ci      of GPIOs is set by the width, with bit 0 corresponding to GPIO 0.
4162306a36Sopenharmony_ci    items:
4262306a36Sopenharmony_ci      - description:
4362306a36Sopenharmony_ci          Register to READ the value of the GPIO lines. If GPIO line is high,
4462306a36Sopenharmony_ci          the bit will be set. If the GPIO line is low, the bit will be cleared.
4562306a36Sopenharmony_ci          This register may also be used to drive GPIOs if the SET register is
4662306a36Sopenharmony_ci          omitted.
4762306a36Sopenharmony_ci      - description:
4862306a36Sopenharmony_ci          Register to SET the value of the GPIO lines. Setting a bit in this
4962306a36Sopenharmony_ci          register will drive the GPIO line high.
5062306a36Sopenharmony_ci      - description:
5162306a36Sopenharmony_ci          Register to CLEAR the value of the GPIO lines. Setting a bit in this
5262306a36Sopenharmony_ci          register will drive the GPIO line low. If this register is omitted,
5362306a36Sopenharmony_ci          the SET register will be used to clear the GPIO lines as well, by
5462306a36Sopenharmony_ci          actively writing the line with 0.
5562306a36Sopenharmony_ci      - description:
5662306a36Sopenharmony_ci          Register to set the line as OUTPUT. Setting a bit in this register
5762306a36Sopenharmony_ci          will turn that line into an output line. Conversely, clearing a bit
5862306a36Sopenharmony_ci          will turn that line into an input.
5962306a36Sopenharmony_ci      - description:
6062306a36Sopenharmony_ci          Register to set this line as INPUT. Setting a bit in this register
6162306a36Sopenharmony_ci          will turn that line into an input line. Conversely, clearing a bit
6262306a36Sopenharmony_ci          will turn that line into an output.
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci  reg-names:
6562306a36Sopenharmony_ci    minItems: 1
6662306a36Sopenharmony_ci    maxItems: 5
6762306a36Sopenharmony_ci    items:
6862306a36Sopenharmony_ci      enum:
6962306a36Sopenharmony_ci        - dat
7062306a36Sopenharmony_ci        - set
7162306a36Sopenharmony_ci        - clr
7262306a36Sopenharmony_ci        - dirout
7362306a36Sopenharmony_ci        - dirin
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci  native-endian: true
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ci  no-output:
7862306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/flag
7962306a36Sopenharmony_ci    description:
8062306a36Sopenharmony_ci      If this property is present, the controller cannot drive the GPIO lines.
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_cirequired:
8362306a36Sopenharmony_ci  - compatible
8462306a36Sopenharmony_ci  - reg
8562306a36Sopenharmony_ci  - reg-names
8662306a36Sopenharmony_ci  - '#gpio-cells'
8762306a36Sopenharmony_ci  - gpio-controller
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ciadditionalProperties: false
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ciexamples:
9262306a36Sopenharmony_ci  - |
9362306a36Sopenharmony_ci    gpio@1f300010 {
9462306a36Sopenharmony_ci      compatible = "ni,169445-nand-gpio";
9562306a36Sopenharmony_ci      reg = <0x1f300010 0x4>;
9662306a36Sopenharmony_ci      reg-names = "dat";
9762306a36Sopenharmony_ci      gpio-controller;
9862306a36Sopenharmony_ci      #gpio-cells = <2>;
9962306a36Sopenharmony_ci    };
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ci    gpio@e0100000 {
10262306a36Sopenharmony_ci      compatible = "wd,mbl-gpio";
10362306a36Sopenharmony_ci      reg-names = "dat";
10462306a36Sopenharmony_ci      reg = <0xe0100000 0x1>;
10562306a36Sopenharmony_ci      #gpio-cells = <2>;
10662306a36Sopenharmony_ci      gpio-controller;
10762306a36Sopenharmony_ci      no-output;
10862306a36Sopenharmony_ci    };
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ci    gpio@fffe0406 {
11162306a36Sopenharmony_ci      compatible = "brcm,bcm6345-gpio";
11262306a36Sopenharmony_ci      reg-names = "dirout", "dat";
11362306a36Sopenharmony_ci      reg = <0xfffe0406 2>, <0xfffe040a 2>;
11462306a36Sopenharmony_ci      native-endian;
11562306a36Sopenharmony_ci      gpio-controller;
11662306a36Sopenharmony_ci      #gpio-cells = <2>;
11762306a36Sopenharmony_ci    };
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