162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/gpio/brcm,brcmstb-gpio.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Broadcom STB "UPG GIO" GPIO controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cidescription: >
1062306a36Sopenharmony_ci  The controller's registers are organized as sets of eight 32-bit
1162306a36Sopenharmony_ci  registers with each set controlling a bank of up to 32 pins.  A single
1262306a36Sopenharmony_ci  interrupt is shared for all of the banks handled by the controller.
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_cimaintainers:
1562306a36Sopenharmony_ci  - Doug Berger <opendmb@gmail.com>
1662306a36Sopenharmony_ci  - Florian Fainelli <f.fainelli@gmail.com>
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ciproperties:
1962306a36Sopenharmony_ci  compatible:
2062306a36Sopenharmony_ci    items:
2162306a36Sopenharmony_ci      - enum:
2262306a36Sopenharmony_ci          - brcm,bcm7445-gpio
2362306a36Sopenharmony_ci      - const: brcm,brcmstb-gpio
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci  reg:
2662306a36Sopenharmony_ci    maxItems: 1
2762306a36Sopenharmony_ci    description: >
2862306a36Sopenharmony_ci      Define the base and range of the I/O address space containing
2962306a36Sopenharmony_ci      the brcmstb GPIO controller registers
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  "#gpio-cells":
3262306a36Sopenharmony_ci    const: 2
3362306a36Sopenharmony_ci    description: >
3462306a36Sopenharmony_ci      The first cell is the pin number (within the controller's
3562306a36Sopenharmony_ci      pin space), and the second is used for the following:
3662306a36Sopenharmony_ci      bit[0]: polarity (0 for active-high, 1 for active-low)
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci  gpio-controller: true
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci  brcm,gpio-bank-widths:
4162306a36Sopenharmony_ci    $ref: /schemas/types.yaml#/definitions/uint32-array
4262306a36Sopenharmony_ci    description: >
4362306a36Sopenharmony_ci      Number of GPIO lines for each bank.  Number of elements must
4462306a36Sopenharmony_ci      correspond to number of banks suggested by the 'reg' property.
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci  interrupts:
4762306a36Sopenharmony_ci    maxItems: 1
4862306a36Sopenharmony_ci    description: >
4962306a36Sopenharmony_ci      The interrupt shared by all GPIO lines for this controller.
5062306a36Sopenharmony_ci
5162306a36Sopenharmony_ci  "#interrupt-cells":
5262306a36Sopenharmony_ci    const: 2
5362306a36Sopenharmony_ci    description: |
5462306a36Sopenharmony_ci      The first cell is the GPIO number, the second should specify
5562306a36Sopenharmony_ci      flags.  The following subset of flags is supported:
5662306a36Sopenharmony_ci      - bits[3:0] trigger type and level flags
5762306a36Sopenharmony_ci        1 = low-to-high edge triggered
5862306a36Sopenharmony_ci        2 = high-to-low edge triggered
5962306a36Sopenharmony_ci        4 = active high level-sensitive
6062306a36Sopenharmony_ci        8 = active low level-sensitive
6162306a36Sopenharmony_ci      Valid combinations are 1, 2, 3, 4, 8.
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci  interrupt-controller: true
6462306a36Sopenharmony_ci
6562306a36Sopenharmony_ci  wakeup-source:
6662306a36Sopenharmony_ci    type: boolean
6762306a36Sopenharmony_ci    description: >
6862306a36Sopenharmony_ci      GPIOs for this controller can be used as a wakeup source
6962306a36Sopenharmony_ci
7062306a36Sopenharmony_cirequired:
7162306a36Sopenharmony_ci  - compatible
7262306a36Sopenharmony_ci  - reg
7362306a36Sopenharmony_ci  - gpio-controller
7462306a36Sopenharmony_ci  - "#gpio-cells"
7562306a36Sopenharmony_ci  - "brcm,gpio-bank-widths"
7662306a36Sopenharmony_ci
7762306a36Sopenharmony_ciadditionalProperties: false
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ciexamples:
8062306a36Sopenharmony_ci  - |
8162306a36Sopenharmony_ci    upg_gio: gpio@f040a700 {
8262306a36Sopenharmony_ci        #gpio-cells = <2>;
8362306a36Sopenharmony_ci        #interrupt-cells = <2>;
8462306a36Sopenharmony_ci        compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
8562306a36Sopenharmony_ci        gpio-controller;
8662306a36Sopenharmony_ci        interrupt-controller;
8762306a36Sopenharmony_ci        reg = <0xf040a700 0x80>;
8862306a36Sopenharmony_ci        interrupt-parent = <&irq0_intc>;
8962306a36Sopenharmony_ci        interrupts = <0x6>;
9062306a36Sopenharmony_ci        brcm,gpio-bank-widths = <32 32 32 24>;
9162306a36Sopenharmony_ci    };
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_ci    upg_gio_aon: gpio@f04172c0 {
9462306a36Sopenharmony_ci        #gpio-cells = <2>;
9562306a36Sopenharmony_ci        #interrupt-cells = <2>;
9662306a36Sopenharmony_ci        compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio";
9762306a36Sopenharmony_ci        gpio-controller;
9862306a36Sopenharmony_ci        interrupt-controller;
9962306a36Sopenharmony_ci        reg = <0xf04172c0 0x40>;
10062306a36Sopenharmony_ci        interrupt-parent = <&irq0_aon_intc>;
10162306a36Sopenharmony_ci        interrupts = <0x6>;
10262306a36Sopenharmony_ci        wakeup-source;
10362306a36Sopenharmony_ci        brcm,gpio-bank-widths = <18 4>;
10462306a36Sopenharmony_ci    };
105