162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: SiFive Unleashed Rev C000 Platform DMA
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Green Wan <green.wan@sifive.com>
1162306a36Sopenharmony_ci  - Palmer Debbelt <palmer@sifive.com>
1262306a36Sopenharmony_ci  - Paul Walmsley <paul.walmsley@sifive.com>
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_cidescription: |
1562306a36Sopenharmony_ci  Platform DMA is a DMA engine of SiFive Unleashed. It supports 4
1662306a36Sopenharmony_ci  channels. Each channel has 2 interrupts. One is for DMA done and
1762306a36Sopenharmony_ci  the other is for DME error.
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci  In different SoC, DMA could be attached to different IRQ line.
2062306a36Sopenharmony_ci  DT file need to be changed to meet the difference. For technical
2162306a36Sopenharmony_ci  doc,
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  https://static.dev.sifive.com/FU540-C000-v1.0.pdf
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ciallOf:
2662306a36Sopenharmony_ci  - $ref: dma-controller.yaml#
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ciproperties:
2962306a36Sopenharmony_ci  compatible:
3062306a36Sopenharmony_ci    items:
3162306a36Sopenharmony_ci      - enum:
3262306a36Sopenharmony_ci          - sifive,fu540-c000-pdma
3362306a36Sopenharmony_ci      - const: sifive,pdma0
3462306a36Sopenharmony_ci    description:
3562306a36Sopenharmony_ci      Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
3662306a36Sopenharmony_ci      Supported compatible strings are -
3762306a36Sopenharmony_ci      "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
3862306a36Sopenharmony_ci      SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
3962306a36Sopenharmony_ci      with no chip integration tweaks.
4062306a36Sopenharmony_ci
4162306a36Sopenharmony_ci  reg:
4262306a36Sopenharmony_ci    maxItems: 1
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  interrupts:
4562306a36Sopenharmony_ci    minItems: 1
4662306a36Sopenharmony_ci    maxItems: 8
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_ci  dma-channels:
4962306a36Sopenharmony_ci    description: For backwards-compatibility, the default value is 4
5062306a36Sopenharmony_ci    minimum: 1
5162306a36Sopenharmony_ci    maximum: 4
5262306a36Sopenharmony_ci    default: 4
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci  '#dma-cells':
5562306a36Sopenharmony_ci    const: 1
5662306a36Sopenharmony_ci
5762306a36Sopenharmony_cirequired:
5862306a36Sopenharmony_ci  - compatible
5962306a36Sopenharmony_ci  - reg
6062306a36Sopenharmony_ci  - interrupts
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ciunevaluatedProperties: false
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ciexamples:
6562306a36Sopenharmony_ci  - |
6662306a36Sopenharmony_ci    dma-controller@3000000 {
6762306a36Sopenharmony_ci      compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
6862306a36Sopenharmony_ci      reg = <0x3000000 0x8000>;
6962306a36Sopenharmony_ci      dma-channels = <4>;
7062306a36Sopenharmony_ci      interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>, <30>;
7162306a36Sopenharmony_ci      #dma-cells = <1>;
7262306a36Sopenharmony_ci    };
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci...
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