162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/dma/owl-dma.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Actions Semi Owl SoCs DMA controller
862306a36Sopenharmony_ci
962306a36Sopenharmony_cidescription: |
1062306a36Sopenharmony_ci  The OWL DMA is a general-purpose direct memory access controller capable of
1162306a36Sopenharmony_ci  supporting 10 independent DMA channels for the Actions Semi S700 SoC and 12
1262306a36Sopenharmony_ci  independent DMA channels for the S500 and S900 SoC variants.
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_cimaintainers:
1562306a36Sopenharmony_ci  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciallOf:
1862306a36Sopenharmony_ci  - $ref: dma-controller.yaml#
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciproperties:
2162306a36Sopenharmony_ci  compatible:
2262306a36Sopenharmony_ci    enum:
2362306a36Sopenharmony_ci      - actions,s500-dma
2462306a36Sopenharmony_ci      - actions,s700-dma
2562306a36Sopenharmony_ci      - actions,s900-dma
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  reg:
2862306a36Sopenharmony_ci    maxItems: 1
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  interrupts:
3162306a36Sopenharmony_ci    description:
3262306a36Sopenharmony_ci      controller supports 4 interrupts, which are freely assignable to the
3362306a36Sopenharmony_ci      DMA channels.
3462306a36Sopenharmony_ci    maxItems: 4
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci  "#dma-cells":
3762306a36Sopenharmony_ci    const: 1
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  dma-channels:
4062306a36Sopenharmony_ci    maximum: 12
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci  dma-requests:
4362306a36Sopenharmony_ci    maximum: 46
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ci  clocks:
4662306a36Sopenharmony_ci    maxItems: 1
4762306a36Sopenharmony_ci    description:
4862306a36Sopenharmony_ci      Phandle and Specifier of the clock feeding the DMA controller.
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci  power-domains:
5162306a36Sopenharmony_ci    maxItems: 1
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_cirequired:
5462306a36Sopenharmony_ci  - compatible
5562306a36Sopenharmony_ci  - reg
5662306a36Sopenharmony_ci  - interrupts
5762306a36Sopenharmony_ci  - "#dma-cells"
5862306a36Sopenharmony_ci  - dma-channels
5962306a36Sopenharmony_ci  - dma-requests
6062306a36Sopenharmony_ci  - clocks
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ciunevaluatedProperties: false
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ciexamples:
6562306a36Sopenharmony_ci  - |
6662306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/arm-gic.h>
6762306a36Sopenharmony_ci    dma: dma-controller@e0260000 {
6862306a36Sopenharmony_ci        compatible = "actions,s900-dma";
6962306a36Sopenharmony_ci        reg = <0xe0260000 0x1000>;
7062306a36Sopenharmony_ci        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
7162306a36Sopenharmony_ci                     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
7262306a36Sopenharmony_ci                     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
7362306a36Sopenharmony_ci                     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
7462306a36Sopenharmony_ci        #dma-cells = <1>;
7562306a36Sopenharmony_ci        dma-channels = <12>;
7662306a36Sopenharmony_ci        dma-requests = <46>;
7762306a36Sopenharmony_ci        clocks = <&clock 22>;
7862306a36Sopenharmony_ci    };
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ci...
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