162306a36Sopenharmony_ci* Marvell XOR v2 engines
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciRequired properties:
462306a36Sopenharmony_ci- compatible: one of the following values:
562306a36Sopenharmony_ci    "marvell,armada-7k-xor"
662306a36Sopenharmony_ci    "marvell,xor-v2"
762306a36Sopenharmony_ci- reg: Should contain registers location and length (two sets)
862306a36Sopenharmony_ci    the first set is the DMA registers
962306a36Sopenharmony_ci    the second set is the global registers
1062306a36Sopenharmony_ci- msi-parent: Phandle to the MSI-capable interrupt controller used for
1162306a36Sopenharmony_ci  interrupts.
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ciOptional properties:
1462306a36Sopenharmony_ci- clocks: Optional reference to the clocks used by the XOR engine.
1562306a36Sopenharmony_ci- clock-names: mandatory if there is a second clock, in this case the
1662306a36Sopenharmony_ci   name must be "core" for the first clock and "reg" for the second
1762306a36Sopenharmony_ci   one
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciExample:
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci	xor0@400000 {
2362306a36Sopenharmony_ci		compatible = "marvell,xor-v2";
2462306a36Sopenharmony_ci		reg = <0x400000 0x1000>,
2562306a36Sopenharmony_ci		      <0x410000 0x1000>;
2662306a36Sopenharmony_ci		msi-parent = <&gic_v2m0>;
2762306a36Sopenharmony_ci		dma-coherent;
2862306a36Sopenharmony_ci	};
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