162306a36Sopenharmony_ci* Milbeaut AXI DMA Controller
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciMilbeaut AXI DMA controller has only memory to memory transfer capability.
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci* DMA controller
662306a36Sopenharmony_ci
762306a36Sopenharmony_ciRequired property:
862306a36Sopenharmony_ci- compatible: 	Should be  "socionext,milbeaut-m10v-xdmac"
962306a36Sopenharmony_ci- reg:		Should contain DMA registers location and length.
1062306a36Sopenharmony_ci- interrupts: 	Should contain all of the per-channel DMA interrupts.
1162306a36Sopenharmony_ci                Number of channels is configurable - 2, 4 or 8, so
1262306a36Sopenharmony_ci                the number of interrupts specified should be {2,4,8}.
1362306a36Sopenharmony_ci- #dma-cells: 	Should be 1.
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciExample:
1662306a36Sopenharmony_ci	xdmac0: dma-controller@1c250000 {
1762306a36Sopenharmony_ci		compatible = "socionext,milbeaut-m10v-xdmac";
1862306a36Sopenharmony_ci		reg = <0x1c250000 0x1000>;
1962306a36Sopenharmony_ci		interrupts = <0 17 0x4>,
2062306a36Sopenharmony_ci			     <0 18 0x4>,
2162306a36Sopenharmony_ci			     <0 19 0x4>,
2262306a36Sopenharmony_ci			     <0 20 0x4>;
2362306a36Sopenharmony_ci		#dma-cells = <1>;
2462306a36Sopenharmony_ci	};
25