162306a36Sopenharmony_ci* Milbeaut AHB DMA Controller
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciMilbeaut AHB DMA controller has transfer capability below.
462306a36Sopenharmony_ci - device to memory transfer
562306a36Sopenharmony_ci - memory to device transfer
662306a36Sopenharmony_ci
762306a36Sopenharmony_ciRequired property:
862306a36Sopenharmony_ci- compatible:       Should be  "socionext,milbeaut-m10v-hdmac"
962306a36Sopenharmony_ci- reg:              Should contain DMA registers location and length.
1062306a36Sopenharmony_ci- interrupts:       Should contain all of the per-channel DMA interrupts.
1162306a36Sopenharmony_ci                     Number of channels is configurable - 2, 4 or 8, so
1262306a36Sopenharmony_ci                     the number of interrupts specified should be {2,4,8}.
1362306a36Sopenharmony_ci- #dma-cells:       Should be 1. Specify the ID of the slave.
1462306a36Sopenharmony_ci- clocks:           Phandle to the clock used by the HDMAC module.
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciExample:
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ci	hdmac1: dma-controller@1e110000 {
2062306a36Sopenharmony_ci		compatible = "socionext,milbeaut-m10v-hdmac";
2162306a36Sopenharmony_ci		reg = <0x1e110000 0x10000>;
2262306a36Sopenharmony_ci		interrupts = <0 132 4>,
2362306a36Sopenharmony_ci			     <0 133 4>,
2462306a36Sopenharmony_ci			     <0 134 4>,
2562306a36Sopenharmony_ci			     <0 135 4>,
2662306a36Sopenharmony_ci			     <0 136 4>,
2762306a36Sopenharmony_ci			     <0 137 4>,
2862306a36Sopenharmony_ci			     <0 138 4>,
2962306a36Sopenharmony_ci			     <0 139 4>;
3062306a36Sopenharmony_ci		#dma-cells = <1>;
3162306a36Sopenharmony_ci		clocks = <&dummy_clk>;
3262306a36Sopenharmony_ci	};
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