162306a36Sopenharmony_ci* IMG Multi-threaded DMA Controller (MDC) 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci- compatible: Must be "img,pistachio-mdc-dma". 562306a36Sopenharmony_ci- reg: Must contain the base address and length of the MDC registers. 662306a36Sopenharmony_ci- interrupts: Must contain all the per-channel DMA interrupts. 762306a36Sopenharmony_ci- clocks: Must contain an entry for each entry in clock-names. 862306a36Sopenharmony_ci See ../clock/clock-bindings.txt for details. 962306a36Sopenharmony_ci- clock-names: Must include the following entries: 1062306a36Sopenharmony_ci - sys: MDC system interface clock. 1162306a36Sopenharmony_ci- img,cr-periph: Must contain a phandle to the peripheral control syscon 1262306a36Sopenharmony_ci node which contains the DMA request to channel mapping registers. 1362306a36Sopenharmony_ci- img,max-burst-multiplier: Must be the maximum supported burst size multiplier. 1462306a36Sopenharmony_ci The maximum burst size is this value multiplied by the hardware-reported bus 1562306a36Sopenharmony_ci width. 1662306a36Sopenharmony_ci- #dma-cells: Must be 3: 1762306a36Sopenharmony_ci - The first cell is the peripheral's DMA request line. 1862306a36Sopenharmony_ci - The second cell is a bitmap specifying to which channels the DMA request 1962306a36Sopenharmony_ci line may be mapped (i.e. bit N set indicates channel N is usable). 2062306a36Sopenharmony_ci - The third cell is the thread ID to be used by the channel. 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ciOptional properties: 2362306a36Sopenharmony_ci- dma-channels: Number of supported DMA channels, up to 32. If not specified 2462306a36Sopenharmony_ci the number reported by the hardware is used. 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ciExample: 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_cimdc: dma-controller@18143000 { 2962306a36Sopenharmony_ci compatible = "img,pistachio-mdc-dma"; 3062306a36Sopenharmony_ci reg = <0x18143000 0x1000>; 3162306a36Sopenharmony_ci interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>, 3262306a36Sopenharmony_ci <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>, 3362306a36Sopenharmony_ci <GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>, 3462306a36Sopenharmony_ci <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>, 3562306a36Sopenharmony_ci <GIC_SHARED 31 IRQ_TYPE_LEVEL_HIGH>, 3662306a36Sopenharmony_ci <GIC_SHARED 32 IRQ_TYPE_LEVEL_HIGH>, 3762306a36Sopenharmony_ci <GIC_SHARED 33 IRQ_TYPE_LEVEL_HIGH>, 3862306a36Sopenharmony_ci <GIC_SHARED 34 IRQ_TYPE_LEVEL_HIGH>, 3962306a36Sopenharmony_ci <GIC_SHARED 35 IRQ_TYPE_LEVEL_HIGH>, 4062306a36Sopenharmony_ci <GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>, 4162306a36Sopenharmony_ci <GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>, 4262306a36Sopenharmony_ci <GIC_SHARED 38 IRQ_TYPE_LEVEL_HIGH>; 4362306a36Sopenharmony_ci clocks = <&system_clk>; 4462306a36Sopenharmony_ci clock-names = "sys"; 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci img,max-burst-multiplier = <16>; 4762306a36Sopenharmony_ci img,cr-periph = <&cr_periph>; 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci #dma-cells = <3>; 5062306a36Sopenharmony_ci}; 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_cispi@18100f00 { 5362306a36Sopenharmony_ci ... 5462306a36Sopenharmony_ci dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>; 5562306a36Sopenharmony_ci dma-names = "tx", "rx"; 5662306a36Sopenharmony_ci ... 5762306a36Sopenharmony_ci}; 58