162306a36Sopenharmony_ciApplied Micro X-Gene SoC DMA nodes
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciDMA nodes are defined to describe on-chip DMA interfaces in
462306a36Sopenharmony_ciAPM X-Gene SoC.
562306a36Sopenharmony_ci
662306a36Sopenharmony_ciRequired properties for DMA interfaces:
762306a36Sopenharmony_ci- compatible: Should be "apm,xgene-dma".
862306a36Sopenharmony_ci- device_type: set to "dma".
962306a36Sopenharmony_ci- reg: Address and length of the register set for the device.
1062306a36Sopenharmony_ci  It contains the information of registers in the following order:
1162306a36Sopenharmony_ci  1st - DMA control and status register address space.
1262306a36Sopenharmony_ci  2nd - Descriptor ring control and status register address space.
1362306a36Sopenharmony_ci  3rd - Descriptor ring command register address space.
1462306a36Sopenharmony_ci  4th - Soc efuse register address space.
1562306a36Sopenharmony_ci- interrupts: DMA has 5 interrupts sources. 1st interrupt is
1662306a36Sopenharmony_ci  DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts
1762306a36Sopenharmony_ci  are completion interrupts for each DMA channels.
1862306a36Sopenharmony_ci- clocks: Reference to the clock entry.
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciOptional properties:
2162306a36Sopenharmony_ci- dma-coherent : Present if dma operations are coherent
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciExample:
2462306a36Sopenharmony_ci	dmaclk: dmaclk@1f27c000 {
2562306a36Sopenharmony_ci		compatible = "apm,xgene-device-clock";
2662306a36Sopenharmony_ci		#clock-cells = <1>;
2762306a36Sopenharmony_ci		clocks = <&socplldiv2 0>;
2862306a36Sopenharmony_ci		reg = <0x0 0x1f27c000 0x0 0x1000>;
2962306a36Sopenharmony_ci		reg-names = "csr-reg";
3062306a36Sopenharmony_ci		clock-output-names = "dmaclk";
3162306a36Sopenharmony_ci	};
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci	dma: dma@1f270000 {
3462306a36Sopenharmony_ci			compatible = "apm,xgene-storm-dma";
3562306a36Sopenharmony_ci			device_type = "dma";
3662306a36Sopenharmony_ci			reg = <0x0 0x1f270000 0x0 0x10000>,
3762306a36Sopenharmony_ci			      <0x0 0x1f200000 0x0 0x10000>,
3862306a36Sopenharmony_ci			      <0x0 0x1b000000 0x0 0x400000>,
3962306a36Sopenharmony_ci			      <0x0 0x1054a000 0x0 0x100>;
4062306a36Sopenharmony_ci			interrupts = <0x0 0x82 0x4>,
4162306a36Sopenharmony_ci				     <0x0 0xb8 0x4>,
4262306a36Sopenharmony_ci				     <0x0 0xb9 0x4>,
4362306a36Sopenharmony_ci				     <0x0 0xba 0x4>,
4462306a36Sopenharmony_ci				     <0x0 0xbb 0x4>;
4562306a36Sopenharmony_ci			dma-coherent;
4662306a36Sopenharmony_ci			clocks = <&dmaclk 0>;
4762306a36Sopenharmony_ci	};
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