162306a36Sopenharmony_ciTexas Instruments OMAP Display Subsystem
262306a36Sopenharmony_ci========================================
362306a36Sopenharmony_ci
462306a36Sopenharmony_ciGeneric Description
562306a36Sopenharmony_ci-------------------
662306a36Sopenharmony_ci
762306a36Sopenharmony_ciThis document is a generic description of the OMAP Display Subsystem bindings.
862306a36Sopenharmony_ciBinding details for each OMAP SoC version are described in respective binding
962306a36Sopenharmony_cidocumentation.
1062306a36Sopenharmony_ci
1162306a36Sopenharmony_ciThe OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
1262306a36Sopenharmony_cia number of encoder modules. All DSS versions contain DSS Core and DISPC, but
1362306a36Sopenharmony_cithe encoder modules vary.
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciThe DSS Core is the parent of the other DSS modules, and manages clock routing,
1662306a36Sopenharmony_ciintegration to the SoC, etc.
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ciDISPC is the display controller, which reads pixels from the memory and outputs
1962306a36Sopenharmony_cia RGB pixel stream to encoders.
2062306a36Sopenharmony_ci
2162306a36Sopenharmony_ciThe encoder modules encode the received RGB pixel stream to a video output like
2262306a36Sopenharmony_ciHDMI, MIPI DPI, etc.
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ciVideo Ports
2562306a36Sopenharmony_ci-----------
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ciThe DSS Core and the encoders have video port outputs. The structure of the
2862306a36Sopenharmony_civideo ports is described in Documentation/devicetree/bindings/graph.txt,
2962306a36Sopenharmony_ciand the properties for the ports and endpoints for each encoder are
3062306a36Sopenharmony_cidescribed in the SoC's DSS binding documentation.
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ciThe video ports are used to describe the connections to external hardware, like
3362306a36Sopenharmony_cipanels or external encoders.
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ciAliases
3662306a36Sopenharmony_ci-------
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ciThe board dts file may define aliases for displays to assign "displayX" style
3962306a36Sopenharmony_ciname for each display. If no aliases are defined, a semi-random number is used
4062306a36Sopenharmony_cifor the display.
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ciExample
4362306a36Sopenharmony_ci-------
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ciA shortened example of the DSS description for OMAP4, with non-relevant parts
4662306a36Sopenharmony_ciremoved, defined in omap4.dtsi:
4762306a36Sopenharmony_ci
4862306a36Sopenharmony_cidss: dss@58000000 {
4962306a36Sopenharmony_ci	compatible = "ti,omap4-dss";
5062306a36Sopenharmony_ci	reg = <0x58000000 0x80>;
5162306a36Sopenharmony_ci	status = "disabled";
5262306a36Sopenharmony_ci	ti,hwmods = "dss_core";
5362306a36Sopenharmony_ci	clocks = <&dss_dss_clk>;
5462306a36Sopenharmony_ci	clock-names = "fck";
5562306a36Sopenharmony_ci	#address-cells = <1>;
5662306a36Sopenharmony_ci	#size-cells = <1>;
5762306a36Sopenharmony_ci	ranges;
5862306a36Sopenharmony_ci
5962306a36Sopenharmony_ci	dispc@58001000 {
6062306a36Sopenharmony_ci		compatible = "ti,omap4-dispc";
6162306a36Sopenharmony_ci		reg = <0x58001000 0x1000>;
6262306a36Sopenharmony_ci		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
6362306a36Sopenharmony_ci		ti,hwmods = "dss_dispc";
6462306a36Sopenharmony_ci		clocks = <&dss_dss_clk>;
6562306a36Sopenharmony_ci		clock-names = "fck";
6662306a36Sopenharmony_ci	};
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci	hdmi: encoder@58006000 {
6962306a36Sopenharmony_ci		compatible = "ti,omap4-hdmi";
7062306a36Sopenharmony_ci		reg = <0x58006000 0x200>,
7162306a36Sopenharmony_ci		      <0x58006200 0x100>,
7262306a36Sopenharmony_ci		      <0x58006300 0x100>,
7362306a36Sopenharmony_ci		      <0x58006400 0x1000>;
7462306a36Sopenharmony_ci		reg-names = "wp", "pll", "phy", "core";
7562306a36Sopenharmony_ci		interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
7662306a36Sopenharmony_ci		status = "disabled";
7762306a36Sopenharmony_ci		ti,hwmods = "dss_hdmi";
7862306a36Sopenharmony_ci		clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
7962306a36Sopenharmony_ci		clock-names = "fck", "sys_clk";
8062306a36Sopenharmony_ci	};
8162306a36Sopenharmony_ci};
8262306a36Sopenharmony_ci
8362306a36Sopenharmony_ciA shortened example of the board description for OMAP4 Panda board, defined in
8462306a36Sopenharmony_ciomap4-panda.dts.
8562306a36Sopenharmony_ci
8662306a36Sopenharmony_ciThe Panda board has a DVI and a HDMI connector, and the board contains a TFP410
8762306a36Sopenharmony_cichip (MIPI DPI to DVI encoder) and a TPD12S015 chip (HDMI ESD protection & level
8862306a36Sopenharmony_cishifter). The video pipelines for the connectors are formed as follows:
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ciDSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
9162306a36Sopenharmony_ciOMAP HDMI --(HDMI)--> TPD12S015 --(HDMI)--> HDMI Connector
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_ci/ {
9462306a36Sopenharmony_ci	aliases {
9562306a36Sopenharmony_ci		display0 = &dvi0;
9662306a36Sopenharmony_ci		display1 = &hdmi0;
9762306a36Sopenharmony_ci	};
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci	tfp410: encoder@0 {
10062306a36Sopenharmony_ci		compatible = "ti,tfp410";
10162306a36Sopenharmony_ci		gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;	/* 0, power-down */
10262306a36Sopenharmony_ci
10362306a36Sopenharmony_ci		pinctrl-names = "default";
10462306a36Sopenharmony_ci		pinctrl-0 = <&tfp410_pins>;
10562306a36Sopenharmony_ci
10662306a36Sopenharmony_ci		ports {
10762306a36Sopenharmony_ci			#address-cells = <1>;
10862306a36Sopenharmony_ci			#size-cells = <0>;
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ci			port@0 {
11162306a36Sopenharmony_ci				reg = <0>;
11262306a36Sopenharmony_ci
11362306a36Sopenharmony_ci				tfp410_in: endpoint@0 {
11462306a36Sopenharmony_ci					remote-endpoint = <&dpi_out>;
11562306a36Sopenharmony_ci				};
11662306a36Sopenharmony_ci			};
11762306a36Sopenharmony_ci
11862306a36Sopenharmony_ci			port@1 {
11962306a36Sopenharmony_ci				reg = <1>;
12062306a36Sopenharmony_ci
12162306a36Sopenharmony_ci				tfp410_out: endpoint@0 {
12262306a36Sopenharmony_ci					remote-endpoint = <&dvi_connector_in>;
12362306a36Sopenharmony_ci				};
12462306a36Sopenharmony_ci			};
12562306a36Sopenharmony_ci		};
12662306a36Sopenharmony_ci	};
12762306a36Sopenharmony_ci
12862306a36Sopenharmony_ci	dvi0: connector@0 {
12962306a36Sopenharmony_ci		compatible = "dvi-connector";
13062306a36Sopenharmony_ci		label = "dvi";
13162306a36Sopenharmony_ci
13262306a36Sopenharmony_ci		i2c-bus = <&i2c3>;
13362306a36Sopenharmony_ci
13462306a36Sopenharmony_ci		port {
13562306a36Sopenharmony_ci			dvi_connector_in: endpoint {
13662306a36Sopenharmony_ci				remote-endpoint = <&tfp410_out>;
13762306a36Sopenharmony_ci			};
13862306a36Sopenharmony_ci		};
13962306a36Sopenharmony_ci	};
14062306a36Sopenharmony_ci
14162306a36Sopenharmony_ci	tpd12s015: encoder@1 {
14262306a36Sopenharmony_ci		compatible = "ti,tpd12s015";
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci		pinctrl-names = "default";
14562306a36Sopenharmony_ci		pinctrl-0 = <&tpd12s015_pins>;
14662306a36Sopenharmony_ci
14762306a36Sopenharmony_ci		gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>,	/* 60, CT CP HPD */
14862306a36Sopenharmony_ci			<&gpio2 9 GPIO_ACTIVE_HIGH>,	/* 41, LS OE */
14962306a36Sopenharmony_ci			<&gpio2 31 GPIO_ACTIVE_HIGH>;	/* 63, HPD */
15062306a36Sopenharmony_ci
15162306a36Sopenharmony_ci		ports {
15262306a36Sopenharmony_ci			#address-cells = <1>;
15362306a36Sopenharmony_ci			#size-cells = <0>;
15462306a36Sopenharmony_ci
15562306a36Sopenharmony_ci			port@0 {
15662306a36Sopenharmony_ci				reg = <0>;
15762306a36Sopenharmony_ci
15862306a36Sopenharmony_ci				tpd12s015_in: endpoint@0 {
15962306a36Sopenharmony_ci					remote-endpoint = <&hdmi_out>;
16062306a36Sopenharmony_ci				};
16162306a36Sopenharmony_ci			};
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_ci			port@1 {
16462306a36Sopenharmony_ci				reg = <1>;
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_ci				tpd12s015_out: endpoint@0 {
16762306a36Sopenharmony_ci					remote-endpoint = <&hdmi_connector_in>;
16862306a36Sopenharmony_ci				};
16962306a36Sopenharmony_ci			};
17062306a36Sopenharmony_ci		};
17162306a36Sopenharmony_ci	};
17262306a36Sopenharmony_ci
17362306a36Sopenharmony_ci	hdmi0: connector@1 {
17462306a36Sopenharmony_ci		compatible = "hdmi-connector";
17562306a36Sopenharmony_ci		label = "hdmi";
17662306a36Sopenharmony_ci
17762306a36Sopenharmony_ci		port {
17862306a36Sopenharmony_ci			hdmi_connector_in: endpoint {
17962306a36Sopenharmony_ci				remote-endpoint = <&tpd12s015_out>;
18062306a36Sopenharmony_ci			};
18162306a36Sopenharmony_ci		};
18262306a36Sopenharmony_ci	};
18362306a36Sopenharmony_ci};
18462306a36Sopenharmony_ci
18562306a36Sopenharmony_ci&dss {
18662306a36Sopenharmony_ci	status = "ok";
18762306a36Sopenharmony_ci
18862306a36Sopenharmony_ci	pinctrl-names = "default";
18962306a36Sopenharmony_ci	pinctrl-0 = <&dss_dpi_pins>;
19062306a36Sopenharmony_ci
19162306a36Sopenharmony_ci	port {
19262306a36Sopenharmony_ci		dpi_out: endpoint {
19362306a36Sopenharmony_ci			remote-endpoint = <&tfp410_in>;
19462306a36Sopenharmony_ci			data-lines = <24>;
19562306a36Sopenharmony_ci		};
19662306a36Sopenharmony_ci	};
19762306a36Sopenharmony_ci};
19862306a36Sopenharmony_ci
19962306a36Sopenharmony_ci&hdmi {
20062306a36Sopenharmony_ci	status = "ok";
20162306a36Sopenharmony_ci	vdda-supply = <&vdac>;
20262306a36Sopenharmony_ci
20362306a36Sopenharmony_ci	pinctrl-names = "default";
20462306a36Sopenharmony_ci	pinctrl-0 = <&dss_hdmi_pins>;
20562306a36Sopenharmony_ci
20662306a36Sopenharmony_ci	port {
20762306a36Sopenharmony_ci		hdmi_out: endpoint {
20862306a36Sopenharmony_ci			remote-endpoint = <&tpd12s015_in>;
20962306a36Sopenharmony_ci		};
21062306a36Sopenharmony_ci	};
21162306a36Sopenharmony_ci};
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