162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: NVIDIA Tegra Video Input controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Thierry Reding <thierry.reding@gmail.com> 1162306a36Sopenharmony_ci - Jon Hunter <jonathanh@nvidia.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ciproperties: 1462306a36Sopenharmony_ci $nodename: 1562306a36Sopenharmony_ci pattern: "^vi@[0-9a-f]+$" 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci compatible: 1862306a36Sopenharmony_ci oneOf: 1962306a36Sopenharmony_ci - const: nvidia,tegra20-vi 2062306a36Sopenharmony_ci - const: nvidia,tegra30-vi 2162306a36Sopenharmony_ci - const: nvidia,tegra114-vi 2262306a36Sopenharmony_ci - const: nvidia,tegra124-vi 2362306a36Sopenharmony_ci - items: 2462306a36Sopenharmony_ci - const: nvidia,tegra132-vi 2562306a36Sopenharmony_ci - const: nvidia,tegra124-vi 2662306a36Sopenharmony_ci - const: nvidia,tegra210-vi 2762306a36Sopenharmony_ci - const: nvidia,tegra186-vi 2862306a36Sopenharmony_ci - const: nvidia,tegra194-vi 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci reg: 3162306a36Sopenharmony_ci maxItems: 1 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci interrupts: 3462306a36Sopenharmony_ci maxItems: 1 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci clocks: 3762306a36Sopenharmony_ci maxItems: 1 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci resets: 4062306a36Sopenharmony_ci items: 4162306a36Sopenharmony_ci - description: module reset 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci reset-names: 4462306a36Sopenharmony_ci items: 4562306a36Sopenharmony_ci - const: vi 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci iommus: 4862306a36Sopenharmony_ci maxItems: 1 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci interconnects: 5162306a36Sopenharmony_ci minItems: 4 5262306a36Sopenharmony_ci maxItems: 5 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci interconnect-names: 5562306a36Sopenharmony_ci minItems: 4 5662306a36Sopenharmony_ci maxItems: 5 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci operating-points-v2: true 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci power-domains: 6162306a36Sopenharmony_ci items: 6262306a36Sopenharmony_ci - description: phandle to the VENC power domain 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci "#address-cells": 6562306a36Sopenharmony_ci const: 1 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci "#size-cells": 6862306a36Sopenharmony_ci const: 1 6962306a36Sopenharmony_ci 7062306a36Sopenharmony_ci ranges: 7162306a36Sopenharmony_ci maxItems: 1 7262306a36Sopenharmony_ci 7362306a36Sopenharmony_ci avdd-dsi-csi-supply: 7462306a36Sopenharmony_ci description: DSI/CSI power supply. Must supply 1.2 V. 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci vip: 7762306a36Sopenharmony_ci $ref: /schemas/display/tegra/nvidia,tegra20-vip.yaml 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci ports: 8062306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/ports 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci properties: 8362306a36Sopenharmony_ci port@0: 8462306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 8562306a36Sopenharmony_ci description: 8662306a36Sopenharmony_ci Input from the VIP (parallel input capture) module 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_cipatternProperties: 8962306a36Sopenharmony_ci "^csi@[0-9a-f]+$": 9062306a36Sopenharmony_ci type: object 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ciadditionalProperties: false 9362306a36Sopenharmony_ci 9462306a36Sopenharmony_cirequired: 9562306a36Sopenharmony_ci - compatible 9662306a36Sopenharmony_ci - reg 9762306a36Sopenharmony_ci - interrupts 9862306a36Sopenharmony_ci - clocks 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ciallOf: 10162306a36Sopenharmony_ci - if: 10262306a36Sopenharmony_ci properties: 10362306a36Sopenharmony_ci compatible: 10462306a36Sopenharmony_ci contains: 10562306a36Sopenharmony_ci enum: 10662306a36Sopenharmony_ci - nvidia,tegra20-vi 10762306a36Sopenharmony_ci - nvidia,tegra30-vi 10862306a36Sopenharmony_ci - nvidia,tegra114-vi 10962306a36Sopenharmony_ci - nvidia,tegra124-vi 11062306a36Sopenharmony_ci then: 11162306a36Sopenharmony_ci required: 11262306a36Sopenharmony_ci - resets 11362306a36Sopenharmony_ci - reset-names 11462306a36Sopenharmony_ci else: 11562306a36Sopenharmony_ci required: 11662306a36Sopenharmony_ci - power-domains 11762306a36Sopenharmony_ci 11862306a36Sopenharmony_ciexamples: 11962306a36Sopenharmony_ci - | 12062306a36Sopenharmony_ci #include <dt-bindings/clock/tegra20-car.h> 12162306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 12262306a36Sopenharmony_ci 12362306a36Sopenharmony_ci i2c { 12462306a36Sopenharmony_ci #address-cells = <1>; 12562306a36Sopenharmony_ci #size-cells = <0>; 12662306a36Sopenharmony_ci camera@48 { 12762306a36Sopenharmony_ci compatible = "aptina,mt9v111"; 12862306a36Sopenharmony_ci reg = <0x48>; 12962306a36Sopenharmony_ci clocks = <&camera_clk>; 13062306a36Sopenharmony_ci 13162306a36Sopenharmony_ci port { 13262306a36Sopenharmony_ci mt9v111_out: endpoint { 13362306a36Sopenharmony_ci remote-endpoint = <&vi_vip_in>; 13462306a36Sopenharmony_ci }; 13562306a36Sopenharmony_ci }; 13662306a36Sopenharmony_ci }; 13762306a36Sopenharmony_ci }; 13862306a36Sopenharmony_ci 13962306a36Sopenharmony_ci vi@54080000 { 14062306a36Sopenharmony_ci compatible = "nvidia,tegra20-vi"; 14162306a36Sopenharmony_ci reg = <0x54080000 0x00040000>; 14262306a36Sopenharmony_ci interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 14362306a36Sopenharmony_ci clocks = <&tegra_car TEGRA20_CLK_VI>; 14462306a36Sopenharmony_ci resets = <&tegra_car 100>; 14562306a36Sopenharmony_ci reset-names = "vi"; 14662306a36Sopenharmony_ci 14762306a36Sopenharmony_ci vip { 14862306a36Sopenharmony_ci compatible = "nvidia,tegra20-vip"; 14962306a36Sopenharmony_ci ports { 15062306a36Sopenharmony_ci #address-cells = <1>; 15162306a36Sopenharmony_ci #size-cells = <0>; 15262306a36Sopenharmony_ci port@0 { 15362306a36Sopenharmony_ci reg = <0>; 15462306a36Sopenharmony_ci vi_vip_in: endpoint { 15562306a36Sopenharmony_ci remote-endpoint = <&mt9v111_out>; 15662306a36Sopenharmony_ci }; 15762306a36Sopenharmony_ci }; 15862306a36Sopenharmony_ci port@1 { 15962306a36Sopenharmony_ci reg = <1>; 16062306a36Sopenharmony_ci vi_vip_out: endpoint { 16162306a36Sopenharmony_ci remote-endpoint = <&vi_in>; 16262306a36Sopenharmony_ci }; 16362306a36Sopenharmony_ci }; 16462306a36Sopenharmony_ci }; 16562306a36Sopenharmony_ci }; 16662306a36Sopenharmony_ci 16762306a36Sopenharmony_ci ports { 16862306a36Sopenharmony_ci #address-cells = <1>; 16962306a36Sopenharmony_ci #size-cells = <0>; 17062306a36Sopenharmony_ci port@0 { 17162306a36Sopenharmony_ci reg = <0>; 17262306a36Sopenharmony_ci vi_in: endpoint { 17362306a36Sopenharmony_ci remote-endpoint = <&vi_vip_out>; 17462306a36Sopenharmony_ci }; 17562306a36Sopenharmony_ci }; 17662306a36Sopenharmony_ci }; 17762306a36Sopenharmony_ci }; 17862306a36Sopenharmony_ci 17962306a36Sopenharmony_ci - | 18062306a36Sopenharmony_ci #include <dt-bindings/clock/tegra210-car.h> 18162306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 18262306a36Sopenharmony_ci 18362306a36Sopenharmony_ci vi@54080000 { 18462306a36Sopenharmony_ci compatible = "nvidia,tegra210-vi"; 18562306a36Sopenharmony_ci reg = <0x54080000 0x00000700>; 18662306a36Sopenharmony_ci interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 18762306a36Sopenharmony_ci assigned-clocks = <&tegra_car TEGRA210_CLK_VI>; 18862306a36Sopenharmony_ci assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>; 18962306a36Sopenharmony_ci 19062306a36Sopenharmony_ci clocks = <&tegra_car TEGRA210_CLK_VI>; 19162306a36Sopenharmony_ci power-domains = <&pd_venc>; 19262306a36Sopenharmony_ci 19362306a36Sopenharmony_ci #address-cells = <1>; 19462306a36Sopenharmony_ci #size-cells = <1>; 19562306a36Sopenharmony_ci 19662306a36Sopenharmony_ci ranges = <0x0 0x54080000 0x2000>; 19762306a36Sopenharmony_ci 19862306a36Sopenharmony_ci csi@838 { 19962306a36Sopenharmony_ci compatible = "nvidia,tegra210-csi"; 20062306a36Sopenharmony_ci reg = <0x838 0x1300>; 20162306a36Sopenharmony_ci assigned-clocks = <&tegra_car TEGRA210_CLK_CILAB>, 20262306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_CILCD>, 20362306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_CILE>, 20462306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_CSI_TPG>; 20562306a36Sopenharmony_ci assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>, 20662306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_PLL_P>, 20762306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_PLL_P>; 20862306a36Sopenharmony_ci assigned-clock-rates = <102000000>, 20962306a36Sopenharmony_ci <102000000>, 21062306a36Sopenharmony_ci <102000000>, 21162306a36Sopenharmony_ci <972000000>; 21262306a36Sopenharmony_ci 21362306a36Sopenharmony_ci clocks = <&tegra_car TEGRA210_CLK_CSI>, 21462306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_CILAB>, 21562306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_CILCD>, 21662306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_CILE>, 21762306a36Sopenharmony_ci <&tegra_car TEGRA210_CLK_CSI_TPG>; 21862306a36Sopenharmony_ci clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg"; 21962306a36Sopenharmony_ci power-domains = <&pd_sor>; 22062306a36Sopenharmony_ci }; 22162306a36Sopenharmony_ci }; 222