162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi86.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: SN65DSI86 DSI to eDP bridge chip
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Sandeep Panda <spanda@codeaurora.org>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
1462306a36Sopenharmony_ci  https://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciproperties:
1762306a36Sopenharmony_ci  compatible:
1862306a36Sopenharmony_ci    const: ti,sn65dsi86
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ci  reg:
2162306a36Sopenharmony_ci    enum: [ 0x2c, 0x2d ]
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  enable-gpios:
2462306a36Sopenharmony_ci    maxItems: 1
2562306a36Sopenharmony_ci    description: GPIO specifier for bridge_en pin (active high).
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  suspend-gpios:
2862306a36Sopenharmony_ci    maxItems: 1
2962306a36Sopenharmony_ci    description: GPIO specifier for GPIO1 pin on bridge (active low).
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ci  no-hpd:
3262306a36Sopenharmony_ci    type: boolean
3362306a36Sopenharmony_ci    description:
3462306a36Sopenharmony_ci      Set if the HPD line on the bridge isn't hooked up to anything or is
3562306a36Sopenharmony_ci      otherwise unusable.
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  vccio-supply:
3862306a36Sopenharmony_ci    description: A 1.8V supply that powers the digital IOs.
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ci  vpll-supply:
4162306a36Sopenharmony_ci    description: A 1.8V supply that powers the DisplayPort PLL.
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci  vcca-supply:
4462306a36Sopenharmony_ci    description: A 1.2V supply that powers the analog circuits.
4562306a36Sopenharmony_ci
4662306a36Sopenharmony_ci  vcc-supply:
4762306a36Sopenharmony_ci    description: A 1.2V supply that powers the digital core.
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci  interrupts:
5062306a36Sopenharmony_ci    maxItems: 1
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci  clocks:
5362306a36Sopenharmony_ci    maxItems: 1
5462306a36Sopenharmony_ci    description:
5562306a36Sopenharmony_ci      Clock specifier for input reference clock. The reference clock rate must
5662306a36Sopenharmony_ci      be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ci  clock-names:
5962306a36Sopenharmony_ci    const: refclk
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ci  gpio-controller: true
6262306a36Sopenharmony_ci  '#gpio-cells':
6362306a36Sopenharmony_ci    const: 2
6462306a36Sopenharmony_ci    description:
6562306a36Sopenharmony_ci      First cell is pin number, second cell is flags.  GPIO pin numbers are
6662306a36Sopenharmony_ci      1-based to match the datasheet.  See ../../gpio/gpio.txt for more
6762306a36Sopenharmony_ci      information.
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ci  '#pwm-cells':
7062306a36Sopenharmony_ci    const: 1
7162306a36Sopenharmony_ci    description: See ../../pwm/pwm.yaml for description of the cell formats.
7262306a36Sopenharmony_ci
7362306a36Sopenharmony_ci  aux-bus:
7462306a36Sopenharmony_ci    $ref: /schemas/display/dp-aux-bus.yaml#
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ci  ports:
7762306a36Sopenharmony_ci    $ref: /schemas/graph.yaml#/properties/ports
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ci    properties:
8062306a36Sopenharmony_ci      port@0:
8162306a36Sopenharmony_ci        $ref: /schemas/graph.yaml#/properties/port
8262306a36Sopenharmony_ci        description:
8362306a36Sopenharmony_ci          Video port for MIPI DSI input
8462306a36Sopenharmony_ci
8562306a36Sopenharmony_ci      port@1:
8662306a36Sopenharmony_ci        $ref: /schemas/graph.yaml#/$defs/port-base
8762306a36Sopenharmony_ci        unevaluatedProperties: false
8862306a36Sopenharmony_ci        description:
8962306a36Sopenharmony_ci          Video port for eDP output (panel or connector).
9062306a36Sopenharmony_ci
9162306a36Sopenharmony_ci        properties:
9262306a36Sopenharmony_ci          endpoint:
9362306a36Sopenharmony_ci            $ref: /schemas/media/video-interfaces.yaml#
9462306a36Sopenharmony_ci            unevaluatedProperties: false
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ci            properties:
9762306a36Sopenharmony_ci              data-lanes:
9862306a36Sopenharmony_ci                oneOf:
9962306a36Sopenharmony_ci                  - minItems: 1
10062306a36Sopenharmony_ci                    maxItems: 1
10162306a36Sopenharmony_ci                    uniqueItems: true
10262306a36Sopenharmony_ci                    items:
10362306a36Sopenharmony_ci                      enum:
10462306a36Sopenharmony_ci                        - 0
10562306a36Sopenharmony_ci                        - 1
10662306a36Sopenharmony_ci                    description:
10762306a36Sopenharmony_ci                      If you have 1 logical lane the bridge supports routing
10862306a36Sopenharmony_ci                      to either port 0 or port 1.  Port 0 is suggested.
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ci                  - minItems: 2
11162306a36Sopenharmony_ci                    maxItems: 2
11262306a36Sopenharmony_ci                    uniqueItems: true
11362306a36Sopenharmony_ci                    items:
11462306a36Sopenharmony_ci                      enum:
11562306a36Sopenharmony_ci                        - 0
11662306a36Sopenharmony_ci                        - 1
11762306a36Sopenharmony_ci                    description:
11862306a36Sopenharmony_ci                      If you have 2 logical lanes the bridge supports
11962306a36Sopenharmony_ci                      reordering but only on physical ports 0 and 1.
12062306a36Sopenharmony_ci
12162306a36Sopenharmony_ci                  - minItems: 4
12262306a36Sopenharmony_ci                    maxItems: 4
12362306a36Sopenharmony_ci                    uniqueItems: true
12462306a36Sopenharmony_ci                    items:
12562306a36Sopenharmony_ci                      enum:
12662306a36Sopenharmony_ci                        - 0
12762306a36Sopenharmony_ci                        - 1
12862306a36Sopenharmony_ci                        - 2
12962306a36Sopenharmony_ci                        - 3
13062306a36Sopenharmony_ci                    description:
13162306a36Sopenharmony_ci                      If you have 4 logical lanes the bridge supports
13262306a36Sopenharmony_ci                      reordering in any way.
13362306a36Sopenharmony_ci
13462306a36Sopenharmony_ci              lane-polarities:
13562306a36Sopenharmony_ci                minItems: 1
13662306a36Sopenharmony_ci                maxItems: 4
13762306a36Sopenharmony_ci                items:
13862306a36Sopenharmony_ci                  enum:
13962306a36Sopenharmony_ci                    - 0
14062306a36Sopenharmony_ci                    - 1
14162306a36Sopenharmony_ci
14262306a36Sopenharmony_ci            dependencies:
14362306a36Sopenharmony_ci              lane-polarities: [data-lanes]
14462306a36Sopenharmony_ci
14562306a36Sopenharmony_ci    required:
14662306a36Sopenharmony_ci      - port@0
14762306a36Sopenharmony_ci      - port@1
14862306a36Sopenharmony_ci
14962306a36Sopenharmony_cirequired:
15062306a36Sopenharmony_ci  - compatible
15162306a36Sopenharmony_ci  - reg
15262306a36Sopenharmony_ci  - vccio-supply
15362306a36Sopenharmony_ci  - vpll-supply
15462306a36Sopenharmony_ci  - vcca-supply
15562306a36Sopenharmony_ci  - vcc-supply
15662306a36Sopenharmony_ci  - ports
15762306a36Sopenharmony_ci
15862306a36Sopenharmony_ciadditionalProperties: false
15962306a36Sopenharmony_ci
16062306a36Sopenharmony_ciexamples:
16162306a36Sopenharmony_ci  - |
16262306a36Sopenharmony_ci    #include <dt-bindings/clock/qcom,rpmh.h>
16362306a36Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
16462306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_ci    i2c {
16762306a36Sopenharmony_ci      #address-cells = <1>;
16862306a36Sopenharmony_ci      #size-cells = <0>;
16962306a36Sopenharmony_ci
17062306a36Sopenharmony_ci      bridge@2d {
17162306a36Sopenharmony_ci        compatible = "ti,sn65dsi86";
17262306a36Sopenharmony_ci        reg = <0x2d>;
17362306a36Sopenharmony_ci
17462306a36Sopenharmony_ci        interrupt-parent = <&tlmm>;
17562306a36Sopenharmony_ci        interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
17662306a36Sopenharmony_ci
17762306a36Sopenharmony_ci        enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
17862306a36Sopenharmony_ci
17962306a36Sopenharmony_ci        vpll-supply = <&src_pp1800_s4a>;
18062306a36Sopenharmony_ci        vccio-supply = <&src_pp1800_s4a>;
18162306a36Sopenharmony_ci        vcca-supply = <&src_pp1200_l2a>;
18262306a36Sopenharmony_ci        vcc-supply = <&src_pp1200_l2a>;
18362306a36Sopenharmony_ci
18462306a36Sopenharmony_ci        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
18562306a36Sopenharmony_ci        clock-names = "refclk";
18662306a36Sopenharmony_ci
18762306a36Sopenharmony_ci        no-hpd;
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ci        ports {
19062306a36Sopenharmony_ci          #address-cells = <1>;
19162306a36Sopenharmony_ci          #size-cells = <0>;
19262306a36Sopenharmony_ci
19362306a36Sopenharmony_ci          port@0 {
19462306a36Sopenharmony_ci            reg = <0>;
19562306a36Sopenharmony_ci            endpoint {
19662306a36Sopenharmony_ci              remote-endpoint = <&dsi0_out>;
19762306a36Sopenharmony_ci            };
19862306a36Sopenharmony_ci          };
19962306a36Sopenharmony_ci
20062306a36Sopenharmony_ci          port@1 {
20162306a36Sopenharmony_ci            reg = <1>;
20262306a36Sopenharmony_ci            sn65dsi86_out: endpoint {
20362306a36Sopenharmony_ci              remote-endpoint = <&panel_in_edp>;
20462306a36Sopenharmony_ci            };
20562306a36Sopenharmony_ci          };
20662306a36Sopenharmony_ci        };
20762306a36Sopenharmony_ci
20862306a36Sopenharmony_ci        aux-bus {
20962306a36Sopenharmony_ci          panel {
21062306a36Sopenharmony_ci            compatible = "boe,nv133fhm-n62";
21162306a36Sopenharmony_ci            power-supply = <&pp3300_dx_edp>;
21262306a36Sopenharmony_ci            backlight = <&backlight>;
21362306a36Sopenharmony_ci            hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
21462306a36Sopenharmony_ci
21562306a36Sopenharmony_ci            port {
21662306a36Sopenharmony_ci              panel_in_edp: endpoint {
21762306a36Sopenharmony_ci                remote-endpoint = <&sn65dsi86_out>;
21862306a36Sopenharmony_ci              };
21962306a36Sopenharmony_ci            };
22062306a36Sopenharmony_ci          };
22162306a36Sopenharmony_ci        };
22262306a36Sopenharmony_ci      };
22362306a36Sopenharmony_ci    };
22462306a36Sopenharmony_ci  - |
22562306a36Sopenharmony_ci    #include <dt-bindings/clock/qcom,rpmh.h>
22662306a36Sopenharmony_ci    #include <dt-bindings/gpio/gpio.h>
22762306a36Sopenharmony_ci    #include <dt-bindings/interrupt-controller/irq.h>
22862306a36Sopenharmony_ci
22962306a36Sopenharmony_ci    i2c {
23062306a36Sopenharmony_ci      #address-cells = <1>;
23162306a36Sopenharmony_ci      #size-cells = <0>;
23262306a36Sopenharmony_ci
23362306a36Sopenharmony_ci      bridge@2d {
23462306a36Sopenharmony_ci        compatible = "ti,sn65dsi86";
23562306a36Sopenharmony_ci        reg = <0x2d>;
23662306a36Sopenharmony_ci
23762306a36Sopenharmony_ci        enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;
23862306a36Sopenharmony_ci        suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
23962306a36Sopenharmony_ci
24062306a36Sopenharmony_ci        interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
24162306a36Sopenharmony_ci
24262306a36Sopenharmony_ci        vccio-supply = <&pm8916_l17>;
24362306a36Sopenharmony_ci        vcca-supply = <&pm8916_l6>;
24462306a36Sopenharmony_ci        vpll-supply = <&pm8916_l17>;
24562306a36Sopenharmony_ci        vcc-supply = <&pm8916_l6>;
24662306a36Sopenharmony_ci
24762306a36Sopenharmony_ci        clock-names = "refclk";
24862306a36Sopenharmony_ci        clocks = <&input_refclk>;
24962306a36Sopenharmony_ci
25062306a36Sopenharmony_ci        ports {
25162306a36Sopenharmony_ci          #address-cells = <1>;
25262306a36Sopenharmony_ci          #size-cells = <0>;
25362306a36Sopenharmony_ci
25462306a36Sopenharmony_ci          port@0 {
25562306a36Sopenharmony_ci            reg = <0>;
25662306a36Sopenharmony_ci
25762306a36Sopenharmony_ci            edp_bridge_in: endpoint {
25862306a36Sopenharmony_ci              remote-endpoint = <&dsi_out>;
25962306a36Sopenharmony_ci            };
26062306a36Sopenharmony_ci          };
26162306a36Sopenharmony_ci
26262306a36Sopenharmony_ci          port@1 {
26362306a36Sopenharmony_ci            reg = <1>;
26462306a36Sopenharmony_ci
26562306a36Sopenharmony_ci            edp_bridge_out: endpoint {
26662306a36Sopenharmony_ci              data-lanes = <2 1 3 0>;
26762306a36Sopenharmony_ci              lane-polarities = <0 1 0 1>;
26862306a36Sopenharmony_ci              remote-endpoint = <&edp_panel_in>;
26962306a36Sopenharmony_ci            };
27062306a36Sopenharmony_ci          };
27162306a36Sopenharmony_ci        };
27262306a36Sopenharmony_ci      };
27362306a36Sopenharmony_ci    };
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