162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Cadence MHDP8546 bridge 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Swapnil Jakhade <sjakhade@cadence.com> 1162306a36Sopenharmony_ci - Yuti Amonkar <yamonkar@cadence.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ciproperties: 1462306a36Sopenharmony_ci compatible: 1562306a36Sopenharmony_ci enum: 1662306a36Sopenharmony_ci - cdns,mhdp8546 1762306a36Sopenharmony_ci - ti,j721e-mhdp8546 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci reg: 2062306a36Sopenharmony_ci minItems: 1 2162306a36Sopenharmony_ci items: 2262306a36Sopenharmony_ci - description: 2362306a36Sopenharmony_ci Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). 2462306a36Sopenharmony_ci The AUX and PMA registers are not part of this range, they are instead 2562306a36Sopenharmony_ci included in the associated PHY. 2662306a36Sopenharmony_ci - description: 2762306a36Sopenharmony_ci Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. 2862306a36Sopenharmony_ci - description: 2962306a36Sopenharmony_ci Register block of mhdptx sapb registers. 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci reg-names: 3262306a36Sopenharmony_ci minItems: 1 3362306a36Sopenharmony_ci items: 3462306a36Sopenharmony_ci - const: mhdptx 3562306a36Sopenharmony_ci - const: j721e-intg 3662306a36Sopenharmony_ci - const: mhdptx-sapb 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci clocks: 3962306a36Sopenharmony_ci maxItems: 1 4062306a36Sopenharmony_ci description: 4162306a36Sopenharmony_ci DP bridge clock, used by the IP to know how to translate a number of 4262306a36Sopenharmony_ci clock cycles into a time (which is used to comply with DP standard timings 4362306a36Sopenharmony_ci and delays). 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci phys: 4662306a36Sopenharmony_ci maxItems: 1 4762306a36Sopenharmony_ci description: 4862306a36Sopenharmony_ci phandle to the DisplayPort PHY. 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci phy-names: 5162306a36Sopenharmony_ci items: 5262306a36Sopenharmony_ci - const: dpphy 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci power-domains: 5562306a36Sopenharmony_ci maxItems: 1 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci interrupts: 5862306a36Sopenharmony_ci maxItems: 1 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci ports: 6162306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/ports 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci properties: 6462306a36Sopenharmony_ci port@0: 6562306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 6662306a36Sopenharmony_ci description: 6762306a36Sopenharmony_ci First input port representing the DP bridge input. 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci port@1: 7062306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 7162306a36Sopenharmony_ci description: 7262306a36Sopenharmony_ci Second input port representing the DP bridge input. 7362306a36Sopenharmony_ci 7462306a36Sopenharmony_ci port@2: 7562306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 7662306a36Sopenharmony_ci description: 7762306a36Sopenharmony_ci Third input port representing the DP bridge input. 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci port@3: 8062306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 8162306a36Sopenharmony_ci description: 8262306a36Sopenharmony_ci Fourth input port representing the DP bridge input. 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci port@4: 8562306a36Sopenharmony_ci $ref: /schemas/graph.yaml#/properties/port 8662306a36Sopenharmony_ci description: 8762306a36Sopenharmony_ci Output port representing the DP bridge output. 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci required: 9062306a36Sopenharmony_ci - port@0 9162306a36Sopenharmony_ci - port@4 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ciallOf: 9462306a36Sopenharmony_ci - if: 9562306a36Sopenharmony_ci properties: 9662306a36Sopenharmony_ci compatible: 9762306a36Sopenharmony_ci contains: 9862306a36Sopenharmony_ci const: ti,j721e-mhdp8546 9962306a36Sopenharmony_ci then: 10062306a36Sopenharmony_ci properties: 10162306a36Sopenharmony_ci reg: 10262306a36Sopenharmony_ci minItems: 2 10362306a36Sopenharmony_ci maxItems: 3 10462306a36Sopenharmony_ci reg-names: 10562306a36Sopenharmony_ci minItems: 2 10662306a36Sopenharmony_ci maxItems: 3 10762306a36Sopenharmony_ci else: 10862306a36Sopenharmony_ci properties: 10962306a36Sopenharmony_ci reg: 11062306a36Sopenharmony_ci minItems: 1 11162306a36Sopenharmony_ci maxItems: 2 11262306a36Sopenharmony_ci reg-names: 11362306a36Sopenharmony_ci minItems: 1 11462306a36Sopenharmony_ci maxItems: 2 11562306a36Sopenharmony_ci 11662306a36Sopenharmony_cirequired: 11762306a36Sopenharmony_ci - compatible 11862306a36Sopenharmony_ci - clocks 11962306a36Sopenharmony_ci - reg 12062306a36Sopenharmony_ci - reg-names 12162306a36Sopenharmony_ci - phys 12262306a36Sopenharmony_ci - phy-names 12362306a36Sopenharmony_ci - interrupts 12462306a36Sopenharmony_ci - ports 12562306a36Sopenharmony_ci 12662306a36Sopenharmony_ciadditionalProperties: false 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ciexamples: 12962306a36Sopenharmony_ci - | 13062306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 13162306a36Sopenharmony_ci bus { 13262306a36Sopenharmony_ci #address-cells = <2>; 13362306a36Sopenharmony_ci #size-cells = <2>; 13462306a36Sopenharmony_ci 13562306a36Sopenharmony_ci mhdp: dp-bridge@f0fb000000 { 13662306a36Sopenharmony_ci compatible = "cdns,mhdp8546"; 13762306a36Sopenharmony_ci reg = <0xf0 0xfb000000 0x0 0x1000000>; 13862306a36Sopenharmony_ci reg-names = "mhdptx"; 13962306a36Sopenharmony_ci clocks = <&mhdp_clock>; 14062306a36Sopenharmony_ci phys = <&dp_phy>; 14162306a36Sopenharmony_ci phy-names = "dpphy"; 14262306a36Sopenharmony_ci interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 14362306a36Sopenharmony_ci 14462306a36Sopenharmony_ci ports { 14562306a36Sopenharmony_ci #address-cells = <1>; 14662306a36Sopenharmony_ci #size-cells = <0>; 14762306a36Sopenharmony_ci 14862306a36Sopenharmony_ci port@0 { 14962306a36Sopenharmony_ci reg = <0>; 15062306a36Sopenharmony_ci dp_bridge_input: endpoint { 15162306a36Sopenharmony_ci remote-endpoint = <&xxx_dpi_output>; 15262306a36Sopenharmony_ci }; 15362306a36Sopenharmony_ci }; 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ci port@4 { 15662306a36Sopenharmony_ci reg = <4>; 15762306a36Sopenharmony_ci dp_bridge_output: endpoint { 15862306a36Sopenharmony_ci remote-endpoint = <&xxx_dp_connector_input>; 15962306a36Sopenharmony_ci }; 16062306a36Sopenharmony_ci }; 16162306a36Sopenharmony_ci }; 16262306a36Sopenharmony_ci }; 16362306a36Sopenharmony_ci }; 16462306a36Sopenharmony_ci... 165