162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Intel Keem Bay OCS AES 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Daniele Alessandrelli <daniele.alessandrelli@intel.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: 1362306a36Sopenharmony_ci The Intel Keem Bay Offload and Crypto Subsystem (OCS) AES engine provides 1462306a36Sopenharmony_ci hardware-accelerated AES/SM4 encryption/decryption. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciproperties: 1762306a36Sopenharmony_ci compatible: 1862306a36Sopenharmony_ci const: intel,keembay-ocs-aes 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci reg: 2162306a36Sopenharmony_ci maxItems: 1 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci interrupts: 2462306a36Sopenharmony_ci maxItems: 1 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci clocks: 2762306a36Sopenharmony_ci maxItems: 1 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_cirequired: 3062306a36Sopenharmony_ci - compatible 3162306a36Sopenharmony_ci - reg 3262306a36Sopenharmony_ci - interrupts 3362306a36Sopenharmony_ci - clocks 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ciadditionalProperties: false 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ciexamples: 3862306a36Sopenharmony_ci - | 3962306a36Sopenharmony_ci #include <dt-bindings/interrupt-controller/arm-gic.h> 4062306a36Sopenharmony_ci crypto@30008000 { 4162306a36Sopenharmony_ci compatible = "intel,keembay-ocs-aes"; 4262306a36Sopenharmony_ci reg = <0x30008000 0x1000>; 4362306a36Sopenharmony_ci interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 4462306a36Sopenharmony_ci clocks = <&scmi_clk 95>; 4562306a36Sopenharmony_ci }; 46