162306a36Sopenharmony_ci* Hisilicon hip07 Security Accelerator (SEC) 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciRequired properties: 462306a36Sopenharmony_ci- compatible: Must contain one of 562306a36Sopenharmony_ci - "hisilicon,hip06-sec" 662306a36Sopenharmony_ci - "hisilicon,hip07-sec" 762306a36Sopenharmony_ci- reg: Memory addresses and lengths of the memory regions through which 862306a36Sopenharmony_ci this device is controlled. 962306a36Sopenharmony_ci Region 0 has registers to control the backend processing engines. 1062306a36Sopenharmony_ci Region 1 has registers for functionality common to all queues. 1162306a36Sopenharmony_ci Regions 2-18 have registers for the 16 individual queues which are isolated 1262306a36Sopenharmony_ci both in hardware and within the driver. 1362306a36Sopenharmony_ci- interrupts: Interrupt specifiers. 1462306a36Sopenharmony_ci Refer to interrupt-controller/interrupts.txt for generic interrupt client node 1562306a36Sopenharmony_ci bindings. 1662306a36Sopenharmony_ci Interrupt 0 is for the SEC unit error queue. 1762306a36Sopenharmony_ci Interrupt 2N + 1 is the completion interrupt for queue N. 1862306a36Sopenharmony_ci Interrupt 2N + 2 is the error interrupt for queue N. 1962306a36Sopenharmony_ci- dma-coherent: The driver assumes coherent dma is possible. 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciOptional properties: 2262306a36Sopenharmony_ci- iommus: The SEC units are behind smmu-v3 iommus. 2362306a36Sopenharmony_ci Refer to iommu/arm,smmu-v3.txt for more information. 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ciExample: 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_cip1_sec_a: crypto@400d2000000 { 2862306a36Sopenharmony_ci compatible = "hisilicon,hip07-sec"; 2962306a36Sopenharmony_ci reg = <0x400 0xd0000000 0x0 0x10000 3062306a36Sopenharmony_ci 0x400 0xd2000000 0x0 0x10000 3162306a36Sopenharmony_ci 0x400 0xd2010000 0x0 0x10000 3262306a36Sopenharmony_ci 0x400 0xd2020000 0x0 0x10000 3362306a36Sopenharmony_ci 0x400 0xd2030000 0x0 0x10000 3462306a36Sopenharmony_ci 0x400 0xd2040000 0x0 0x10000 3562306a36Sopenharmony_ci 0x400 0xd2050000 0x0 0x10000 3662306a36Sopenharmony_ci 0x400 0xd2060000 0x0 0x10000 3762306a36Sopenharmony_ci 0x400 0xd2070000 0x0 0x10000 3862306a36Sopenharmony_ci 0x400 0xd2080000 0x0 0x10000 3962306a36Sopenharmony_ci 0x400 0xd2090000 0x0 0x10000 4062306a36Sopenharmony_ci 0x400 0xd20a0000 0x0 0x10000 4162306a36Sopenharmony_ci 0x400 0xd20b0000 0x0 0x10000 4262306a36Sopenharmony_ci 0x400 0xd20c0000 0x0 0x10000 4362306a36Sopenharmony_ci 0x400 0xd20d0000 0x0 0x10000 4462306a36Sopenharmony_ci 0x400 0xd20e0000 0x0 0x10000 4562306a36Sopenharmony_ci 0x400 0xd20f0000 0x0 0x10000 4662306a36Sopenharmony_ci 0x400 0xd2100000 0x0 0x10000>; 4762306a36Sopenharmony_ci interrupt-parent = <&p1_mbigen_sec_a>; 4862306a36Sopenharmony_ci iommus = <&p1_smmu_alg_a 0x600>; 4962306a36Sopenharmony_ci dma-coherent; 5062306a36Sopenharmony_ci interrupts = <576 4>, 5162306a36Sopenharmony_ci <577 1>, <578 4>, 5262306a36Sopenharmony_ci <579 1>, <580 4>, 5362306a36Sopenharmony_ci <581 1>, <582 4>, 5462306a36Sopenharmony_ci <583 1>, <584 4>, 5562306a36Sopenharmony_ci <585 1>, <586 4>, 5662306a36Sopenharmony_ci <587 1>, <588 4>, 5762306a36Sopenharmony_ci <589 1>, <590 4>, 5862306a36Sopenharmony_ci <591 1>, <592 4>, 5962306a36Sopenharmony_ci <593 1>, <594 4>, 6062306a36Sopenharmony_ci <595 1>, <596 4>, 6162306a36Sopenharmony_ci <597 1>, <598 4>, 6262306a36Sopenharmony_ci <599 1>, <600 4>, 6362306a36Sopenharmony_ci <601 1>, <602 4>, 6462306a36Sopenharmony_ci <603 1>, <604 4>, 6562306a36Sopenharmony_ci <605 1>, <606 4>, 6662306a36Sopenharmony_ci <607 1>, <608 4>; 6762306a36Sopenharmony_ci}; 68