162306a36Sopenharmony_ciThe Broadcom Secure Processing Unit (SPU) hardware supports symmetric 262306a36Sopenharmony_cicryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware 362306a36Sopenharmony_ciblocks. 462306a36Sopenharmony_ci 562306a36Sopenharmony_ciRequired properties: 662306a36Sopenharmony_ci- compatible: Should be one of the following: 762306a36Sopenharmony_ci brcm,spum-crypto - for devices with SPU-M hardware 862306a36Sopenharmony_ci brcm,spu2-crypto - for devices with SPU2 hardware 962306a36Sopenharmony_ci brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3 1062306a36Sopenharmony_ci and Rabin Fingerprint support 1162306a36Sopenharmony_ci brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci- reg: Should contain SPU registers location and length. 1462306a36Sopenharmony_ci- mboxes: The mailbox channel to be used to communicate with the SPU. 1562306a36Sopenharmony_ci Mailbox channels correspond to DMA rings on the device. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciExample: 1862306a36Sopenharmony_ci crypto@612d0000 { 1962306a36Sopenharmony_ci compatible = "brcm,spum-crypto"; 2062306a36Sopenharmony_ci reg = <0 0x612d0000 0 0x900>; 2162306a36Sopenharmony_ci mboxes = <&pdc0 0>; 2262306a36Sopenharmony_ci }; 23