162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm Technologies, Inc. NVMEM CPUFreq 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Ilia Lin <ilia.lin@kernel.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci In certain Qualcomm Technologies, Inc. SoCs such as QCS404, The CPU supply 1462306a36Sopenharmony_ci voltage is dynamically configured by Core Power Reduction (CPR) depending on 1562306a36Sopenharmony_ci current CPU frequency and efuse values. 1662306a36Sopenharmony_ci CPR provides a power domain with multiple levels that are selected depending 1762306a36Sopenharmony_ci on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level 1862306a36Sopenharmony_ci according to the required OPPs defined in the CPU OPP tables. 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci For old implementation efuses are parsed to select the correct opp table and 2162306a36Sopenharmony_ci voltage and CPR is not supported/used. 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ciselect: 2462306a36Sopenharmony_ci properties: 2562306a36Sopenharmony_ci compatible: 2662306a36Sopenharmony_ci contains: 2762306a36Sopenharmony_ci enum: 2862306a36Sopenharmony_ci - qcom,apq8064 2962306a36Sopenharmony_ci - qcom,apq8096 3062306a36Sopenharmony_ci - qcom,ipq8064 3162306a36Sopenharmony_ci - qcom,ipq8074 3262306a36Sopenharmony_ci - qcom,msm8939 3362306a36Sopenharmony_ci - qcom,msm8960 3462306a36Sopenharmony_ci - qcom,msm8974 3562306a36Sopenharmony_ci - qcom,msm8996 3662306a36Sopenharmony_ci - qcom,qcs404 3762306a36Sopenharmony_ci required: 3862306a36Sopenharmony_ci - compatible 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_cipatternProperties: 4162306a36Sopenharmony_ci '^opp-table(-[a-z0-9]+)?$': 4262306a36Sopenharmony_ci allOf: 4362306a36Sopenharmony_ci - if: 4462306a36Sopenharmony_ci properties: 4562306a36Sopenharmony_ci compatible: 4662306a36Sopenharmony_ci const: operating-points-v2-kryo-cpu 4762306a36Sopenharmony_ci then: 4862306a36Sopenharmony_ci $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ci - if: 5162306a36Sopenharmony_ci properties: 5262306a36Sopenharmony_ci compatible: 5362306a36Sopenharmony_ci const: operating-points-v2-qcom-level 5462306a36Sopenharmony_ci then: 5562306a36Sopenharmony_ci $ref: /schemas/opp/opp-v2-qcom-level.yaml# 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci unevaluatedProperties: false 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ciallOf: 6062306a36Sopenharmony_ci - if: 6162306a36Sopenharmony_ci properties: 6262306a36Sopenharmony_ci compatible: 6362306a36Sopenharmony_ci contains: 6462306a36Sopenharmony_ci enum: 6562306a36Sopenharmony_ci - qcom,qcs404 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci then: 6862306a36Sopenharmony_ci properties: 6962306a36Sopenharmony_ci cpus: 7062306a36Sopenharmony_ci type: object 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci patternProperties: 7362306a36Sopenharmony_ci '^cpu@[0-9a-f]+$': 7462306a36Sopenharmony_ci type: object 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_ci properties: 7762306a36Sopenharmony_ci power-domains: 7862306a36Sopenharmony_ci maxItems: 1 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci power-domain-names: 8162306a36Sopenharmony_ci items: 8262306a36Sopenharmony_ci - const: cpr 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci required: 8562306a36Sopenharmony_ci - power-domains 8662306a36Sopenharmony_ci - power-domain-names 8762306a36Sopenharmony_ci 8862306a36Sopenharmony_ci patternProperties: 8962306a36Sopenharmony_ci '^opp-table(-[a-z0-9]+)?$': 9062306a36Sopenharmony_ci if: 9162306a36Sopenharmony_ci properties: 9262306a36Sopenharmony_ci compatible: 9362306a36Sopenharmony_ci const: operating-points-v2-kryo-cpu 9462306a36Sopenharmony_ci then: 9562306a36Sopenharmony_ci patternProperties: 9662306a36Sopenharmony_ci '^opp-?[0-9]+$': 9762306a36Sopenharmony_ci required: 9862306a36Sopenharmony_ci - required-opps 9962306a36Sopenharmony_ci 10062306a36Sopenharmony_ciadditionalProperties: true 10162306a36Sopenharmony_ci 10262306a36Sopenharmony_ciexamples: 10362306a36Sopenharmony_ci - | 10462306a36Sopenharmony_ci / { 10562306a36Sopenharmony_ci model = "Qualcomm Technologies, Inc. QCS404 EVB 1000"; 10662306a36Sopenharmony_ci compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb", "qcom,qcs404"; 10762306a36Sopenharmony_ci #address-cells = <2>; 10862306a36Sopenharmony_ci #size-cells = <2>; 10962306a36Sopenharmony_ci 11062306a36Sopenharmony_ci cpus { 11162306a36Sopenharmony_ci #address-cells = <1>; 11262306a36Sopenharmony_ci #size-cells = <0>; 11362306a36Sopenharmony_ci 11462306a36Sopenharmony_ci CPU0: cpu@100 { 11562306a36Sopenharmony_ci device_type = "cpu"; 11662306a36Sopenharmony_ci compatible = "arm,cortex-a53"; 11762306a36Sopenharmony_ci reg = <0x100>; 11862306a36Sopenharmony_ci enable-method = "psci"; 11962306a36Sopenharmony_ci cpu-idle-states = <&CPU_SLEEP_0>; 12062306a36Sopenharmony_ci next-level-cache = <&L2_0>; 12162306a36Sopenharmony_ci #cooling-cells = <2>; 12262306a36Sopenharmony_ci clocks = <&apcs_glb>; 12362306a36Sopenharmony_ci operating-points-v2 = <&cpu_opp_table>; 12462306a36Sopenharmony_ci power-domains = <&cpr>; 12562306a36Sopenharmony_ci power-domain-names = "cpr"; 12662306a36Sopenharmony_ci }; 12762306a36Sopenharmony_ci 12862306a36Sopenharmony_ci CPU1: cpu@101 { 12962306a36Sopenharmony_ci device_type = "cpu"; 13062306a36Sopenharmony_ci compatible = "arm,cortex-a53"; 13162306a36Sopenharmony_ci reg = <0x101>; 13262306a36Sopenharmony_ci enable-method = "psci"; 13362306a36Sopenharmony_ci cpu-idle-states = <&CPU_SLEEP_0>; 13462306a36Sopenharmony_ci next-level-cache = <&L2_0>; 13562306a36Sopenharmony_ci #cooling-cells = <2>; 13662306a36Sopenharmony_ci clocks = <&apcs_glb>; 13762306a36Sopenharmony_ci operating-points-v2 = <&cpu_opp_table>; 13862306a36Sopenharmony_ci power-domains = <&cpr>; 13962306a36Sopenharmony_ci power-domain-names = "cpr"; 14062306a36Sopenharmony_ci }; 14162306a36Sopenharmony_ci 14262306a36Sopenharmony_ci CPU2: cpu@102 { 14362306a36Sopenharmony_ci device_type = "cpu"; 14462306a36Sopenharmony_ci compatible = "arm,cortex-a53"; 14562306a36Sopenharmony_ci reg = <0x102>; 14662306a36Sopenharmony_ci enable-method = "psci"; 14762306a36Sopenharmony_ci cpu-idle-states = <&CPU_SLEEP_0>; 14862306a36Sopenharmony_ci next-level-cache = <&L2_0>; 14962306a36Sopenharmony_ci #cooling-cells = <2>; 15062306a36Sopenharmony_ci clocks = <&apcs_glb>; 15162306a36Sopenharmony_ci operating-points-v2 = <&cpu_opp_table>; 15262306a36Sopenharmony_ci power-domains = <&cpr>; 15362306a36Sopenharmony_ci power-domain-names = "cpr"; 15462306a36Sopenharmony_ci }; 15562306a36Sopenharmony_ci 15662306a36Sopenharmony_ci CPU3: cpu@103 { 15762306a36Sopenharmony_ci device_type = "cpu"; 15862306a36Sopenharmony_ci compatible = "arm,cortex-a53"; 15962306a36Sopenharmony_ci reg = <0x103>; 16062306a36Sopenharmony_ci enable-method = "psci"; 16162306a36Sopenharmony_ci cpu-idle-states = <&CPU_SLEEP_0>; 16262306a36Sopenharmony_ci next-level-cache = <&L2_0>; 16362306a36Sopenharmony_ci #cooling-cells = <2>; 16462306a36Sopenharmony_ci clocks = <&apcs_glb>; 16562306a36Sopenharmony_ci operating-points-v2 = <&cpu_opp_table>; 16662306a36Sopenharmony_ci power-domains = <&cpr>; 16762306a36Sopenharmony_ci power-domain-names = "cpr"; 16862306a36Sopenharmony_ci }; 16962306a36Sopenharmony_ci }; 17062306a36Sopenharmony_ci 17162306a36Sopenharmony_ci cpu_opp_table: opp-table-cpu { 17262306a36Sopenharmony_ci compatible = "operating-points-v2-kryo-cpu"; 17362306a36Sopenharmony_ci opp-shared; 17462306a36Sopenharmony_ci 17562306a36Sopenharmony_ci opp-1094400000 { 17662306a36Sopenharmony_ci opp-hz = /bits/ 64 <1094400000>; 17762306a36Sopenharmony_ci required-opps = <&cpr_opp1>; 17862306a36Sopenharmony_ci }; 17962306a36Sopenharmony_ci opp-1248000000 { 18062306a36Sopenharmony_ci opp-hz = /bits/ 64 <1248000000>; 18162306a36Sopenharmony_ci required-opps = <&cpr_opp2>; 18262306a36Sopenharmony_ci }; 18362306a36Sopenharmony_ci opp-1401600000 { 18462306a36Sopenharmony_ci opp-hz = /bits/ 64 <1401600000>; 18562306a36Sopenharmony_ci required-opps = <&cpr_opp3>; 18662306a36Sopenharmony_ci }; 18762306a36Sopenharmony_ci }; 18862306a36Sopenharmony_ci 18962306a36Sopenharmony_ci cpr_opp_table: opp-table-cpr { 19062306a36Sopenharmony_ci compatible = "operating-points-v2-qcom-level"; 19162306a36Sopenharmony_ci 19262306a36Sopenharmony_ci cpr_opp1: opp1 { 19362306a36Sopenharmony_ci opp-level = <1>; 19462306a36Sopenharmony_ci qcom,opp-fuse-level = <1>; 19562306a36Sopenharmony_ci }; 19662306a36Sopenharmony_ci cpr_opp2: opp2 { 19762306a36Sopenharmony_ci opp-level = <2>; 19862306a36Sopenharmony_ci qcom,opp-fuse-level = <2>; 19962306a36Sopenharmony_ci }; 20062306a36Sopenharmony_ci cpr_opp3: opp3 { 20162306a36Sopenharmony_ci opp-level = <3>; 20262306a36Sopenharmony_ci qcom,opp-fuse-level = <3>; 20362306a36Sopenharmony_ci }; 20462306a36Sopenharmony_ci }; 20562306a36Sopenharmony_ci }; 206