162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/ti,cdce925.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: TI CDCE913/925/937/949 programmable I2C clock synthesizers 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Alexander Stein <alexander.stein@ew.tq-group.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci Flexible Low Power LVCMOS Clock Generator with SSC Support for EMI Reduction 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913 1662306a36Sopenharmony_ci - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925 1762306a36Sopenharmony_ci - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937 1862306a36Sopenharmony_ci - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ciproperties: 2162306a36Sopenharmony_ci compatible: 2262306a36Sopenharmony_ci enum: 2362306a36Sopenharmony_ci - ti,cdce913 2462306a36Sopenharmony_ci - ti,cdce925 2562306a36Sopenharmony_ci - ti,cdce937 2662306a36Sopenharmony_ci - ti,cdce949 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci reg: 2962306a36Sopenharmony_ci maxItems: 1 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci clocks: 3262306a36Sopenharmony_ci items: 3362306a36Sopenharmony_ci - description: fixed parent clock 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci "#clock-cells": 3662306a36Sopenharmony_ci const: 1 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci vdd-supply: 3962306a36Sopenharmony_ci description: Regulator that provides 1.8V Vdd power supply 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci vddout-supply: 4262306a36Sopenharmony_ci description: | 4362306a36Sopenharmony_ci Regulator that provides Vddout power supply. 4462306a36Sopenharmony_ci non-L variant: 2.5V or 3.3V for 4562306a36Sopenharmony_ci L variant: 1.8V for 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci xtal-load-pf: 4862306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 4962306a36Sopenharmony_ci description: | 5062306a36Sopenharmony_ci Crystal load-capacitor value to fine-tune performance on a 5162306a36Sopenharmony_ci board, or to compensate for external influences. 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_cipatternProperties: 5462306a36Sopenharmony_ci "^PLL[1-4]$": 5562306a36Sopenharmony_ci type: object 5662306a36Sopenharmony_ci description: | 5762306a36Sopenharmony_ci optional child node can be used to specify spread 5862306a36Sopenharmony_ci spectrum clocking parameters for a board 5962306a36Sopenharmony_ci 6062306a36Sopenharmony_ci additionalProperties: false 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci properties: 6362306a36Sopenharmony_ci spread-spectrum: 6462306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 6562306a36Sopenharmony_ci description: SSC mode as defined in the data sheet 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci spread-spectrum-center: 6862306a36Sopenharmony_ci type: boolean 6962306a36Sopenharmony_ci description: | 7062306a36Sopenharmony_ci Use "centered" mode instead of "max" mode. When 7162306a36Sopenharmony_ci present, the clock runs at the requested frequency on average. 7262306a36Sopenharmony_ci Otherwise the requested frequency is the maximum value of the 7362306a36Sopenharmony_ci SCC range. 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_cirequired: 7662306a36Sopenharmony_ci - compatible 7762306a36Sopenharmony_ci - reg 7862306a36Sopenharmony_ci - clocks 7962306a36Sopenharmony_ci - "#clock-cells" 8062306a36Sopenharmony_ci 8162306a36Sopenharmony_ciadditionalProperties: false 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ciexamples: 8462306a36Sopenharmony_ci - | 8562306a36Sopenharmony_ci i2c { 8662306a36Sopenharmony_ci #address-cells = <1>; 8762306a36Sopenharmony_ci #size-cells = <0>; 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci cdce925: clock-controller@64 { 9062306a36Sopenharmony_ci compatible = "ti,cdce925"; 9162306a36Sopenharmony_ci reg = <0x64>; 9262306a36Sopenharmony_ci clocks = <&xtal_27Mhz>; 9362306a36Sopenharmony_ci #clock-cells = <1>; 9462306a36Sopenharmony_ci xtal-load-pf = <5>; 9562306a36Sopenharmony_ci vdd-supply = <®_1v8>; 9662306a36Sopenharmony_ci vddout-supply = <®_3v3>; 9762306a36Sopenharmony_ci /* PLL options to get SSC 1% centered */ 9862306a36Sopenharmony_ci PLL2 { 9962306a36Sopenharmony_ci spread-spectrum = <4>; 10062306a36Sopenharmony_ci spread-spectrum-center; 10162306a36Sopenharmony_ci }; 10262306a36Sopenharmony_ci }; 10362306a36Sopenharmony_ci }; 104