162306a36Sopenharmony_ciBinding for a ST multiplexed clock driver. 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciThis binding supports only simple indexed multiplexers, it does not 462306a36Sopenharmony_cisupport table based parent index to hardware value translations. 562306a36Sopenharmony_ci 662306a36Sopenharmony_ciThis binding uses the common clock binding[1]. 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ciRequired properties: 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_ci- compatible : shall be: 1362306a36Sopenharmony_ci "st,stih407-clkgen-a9-mux" 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ci- #clock-cells : from common clock binding; shall be set to 0. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci- reg : A Base address and length of the register set. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci- clocks : from common clock binding 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciExample: 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci clk_m_a9: clk-m-a9@92b0000 { 2462306a36Sopenharmony_ci #clock-cells = <0>; 2562306a36Sopenharmony_ci compatible = "st,stih407-clkgen-a9-mux"; 2662306a36Sopenharmony_ci reg = <0x92b0000 0x10000>; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci clocks = <&clockgen_a9_pll 0>, 2962306a36Sopenharmony_ci <&clockgen_a9_pll 0>, 3062306a36Sopenharmony_ci <&clk_s_c0_flexgen 13>, 3162306a36Sopenharmony_ci <&clk_m_a9_ext2f_div2>; 3262306a36Sopenharmony_ci }; 33