162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci# Copyright 2022 Unisoc Inc.
362306a36Sopenharmony_ci%YAML 1.2
462306a36Sopenharmony_ci---
562306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#
662306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
762306a36Sopenharmony_ci
862306a36Sopenharmony_cititle: UMS512 Soc clock controller
962306a36Sopenharmony_ci
1062306a36Sopenharmony_cimaintainers:
1162306a36Sopenharmony_ci  - Orson Zhai <orsonzhai@gmail.com>
1262306a36Sopenharmony_ci  - Baolin Wang <baolin.wang7@gmail.com>
1362306a36Sopenharmony_ci  - Chunyan Zhang <zhang.lyra@gmail.com>
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_ciproperties:
1662306a36Sopenharmony_ci  compatible:
1762306a36Sopenharmony_ci    enum:
1862306a36Sopenharmony_ci      - sprd,ums512-apahb-gate
1962306a36Sopenharmony_ci      - sprd,ums512-ap-clk
2062306a36Sopenharmony_ci      - sprd,ums512-aonapb-clk
2162306a36Sopenharmony_ci      - sprd,ums512-pmu-gate
2262306a36Sopenharmony_ci      - sprd,ums512-g0-pll
2362306a36Sopenharmony_ci      - sprd,ums512-g2-pll
2462306a36Sopenharmony_ci      - sprd,ums512-g3-pll
2562306a36Sopenharmony_ci      - sprd,ums512-gc-pll
2662306a36Sopenharmony_ci      - sprd,ums512-aon-gate
2762306a36Sopenharmony_ci      - sprd,ums512-audcpapb-gate
2862306a36Sopenharmony_ci      - sprd,ums512-audcpahb-gate
2962306a36Sopenharmony_ci      - sprd,ums512-gpu-clk
3062306a36Sopenharmony_ci      - sprd,ums512-mm-clk
3162306a36Sopenharmony_ci      - sprd,ums512-mm-gate-clk
3262306a36Sopenharmony_ci      - sprd,ums512-apapb-gate
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ci  "#clock-cells":
3562306a36Sopenharmony_ci    const: 1
3662306a36Sopenharmony_ci
3762306a36Sopenharmony_ci  clocks:
3862306a36Sopenharmony_ci    minItems: 1
3962306a36Sopenharmony_ci    maxItems: 4
4062306a36Sopenharmony_ci    description: |
4162306a36Sopenharmony_ci      The input parent clock(s) phandle for the clock, only list
4262306a36Sopenharmony_ci      fixed clocks which are declared in devicetree.
4362306a36Sopenharmony_ci
4462306a36Sopenharmony_ci  clock-names:
4562306a36Sopenharmony_ci    minItems: 1
4662306a36Sopenharmony_ci    items:
4762306a36Sopenharmony_ci      - const: ext-26m
4862306a36Sopenharmony_ci      - const: ext-32k
4962306a36Sopenharmony_ci      - const: ext-4m
5062306a36Sopenharmony_ci      - const: rco-100m
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci  reg:
5362306a36Sopenharmony_ci    maxItems: 1
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_cirequired:
5662306a36Sopenharmony_ci  - compatible
5762306a36Sopenharmony_ci  - '#clock-cells'
5862306a36Sopenharmony_ci  - reg
5962306a36Sopenharmony_ci
6062306a36Sopenharmony_ciadditionalProperties: false
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ciexamples:
6362306a36Sopenharmony_ci  - |
6462306a36Sopenharmony_ci    ap_clk: clock-controller@20200000 {
6562306a36Sopenharmony_ci      compatible = "sprd,ums512-ap-clk";
6662306a36Sopenharmony_ci      reg = <0x20200000 0x1000>;
6762306a36Sopenharmony_ci      clocks = <&ext_26m>;
6862306a36Sopenharmony_ci      clock-names = "ext-26m";
6962306a36Sopenharmony_ci      #clock-cells = <1>;
7062306a36Sopenharmony_ci    };
7162306a36Sopenharmony_ci...
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