162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci# Copyright 2019 Unisoc Inc. 362306a36Sopenharmony_ci%YAML 1.2 462306a36Sopenharmony_ci--- 562306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml# 662306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 762306a36Sopenharmony_ci 862306a36Sopenharmony_cititle: SC9863A Clock Control Unit 962306a36Sopenharmony_ci 1062306a36Sopenharmony_cimaintainers: 1162306a36Sopenharmony_ci - Orson Zhai <orsonzhai@gmail.com> 1262306a36Sopenharmony_ci - Baolin Wang <baolin.wang7@gmail.com> 1362306a36Sopenharmony_ci - Chunyan Zhang <zhang.lyra@gmail.com> 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciproperties: 1662306a36Sopenharmony_ci "#clock-cells": 1762306a36Sopenharmony_ci const: 1 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci compatible: 2062306a36Sopenharmony_ci enum: 2162306a36Sopenharmony_ci - sprd,sc9863a-ap-clk 2262306a36Sopenharmony_ci - sprd,sc9863a-aon-clk 2362306a36Sopenharmony_ci - sprd,sc9863a-apahb-gate 2462306a36Sopenharmony_ci - sprd,sc9863a-pmu-gate 2562306a36Sopenharmony_ci - sprd,sc9863a-aonapb-gate 2662306a36Sopenharmony_ci - sprd,sc9863a-pll 2762306a36Sopenharmony_ci - sprd,sc9863a-mpll 2862306a36Sopenharmony_ci - sprd,sc9863a-rpll 2962306a36Sopenharmony_ci - sprd,sc9863a-dpll 3062306a36Sopenharmony_ci - sprd,sc9863a-mm-gate 3162306a36Sopenharmony_ci - sprd,sc9863a-mm-clk 3262306a36Sopenharmony_ci - sprd,sc9863a-apapb-gate 3362306a36Sopenharmony_ci 3462306a36Sopenharmony_ci clocks: 3562306a36Sopenharmony_ci minItems: 1 3662306a36Sopenharmony_ci maxItems: 4 3762306a36Sopenharmony_ci description: | 3862306a36Sopenharmony_ci The input parent clock(s) phandle for this clock, only list fixed 3962306a36Sopenharmony_ci clocks which are declared in devicetree. 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci clock-names: 4262306a36Sopenharmony_ci minItems: 1 4362306a36Sopenharmony_ci items: 4462306a36Sopenharmony_ci - const: ext-26m 4562306a36Sopenharmony_ci - const: ext-32k 4662306a36Sopenharmony_ci - const: ext-4m 4762306a36Sopenharmony_ci - const: rco-100m 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci reg: 5062306a36Sopenharmony_ci maxItems: 1 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_cirequired: 5362306a36Sopenharmony_ci - compatible 5462306a36Sopenharmony_ci - '#clock-cells' 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ciif: 5762306a36Sopenharmony_ci properties: 5862306a36Sopenharmony_ci compatible: 5962306a36Sopenharmony_ci enum: 6062306a36Sopenharmony_ci - sprd,sc9863a-ap-clk 6162306a36Sopenharmony_ci - sprd,sc9863a-aon-clk 6262306a36Sopenharmony_cithen: 6362306a36Sopenharmony_ci required: 6462306a36Sopenharmony_ci - reg 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_cielse: 6762306a36Sopenharmony_ci description: | 6862306a36Sopenharmony_ci Other SC9863a clock nodes should be the child of a syscon node in 6962306a36Sopenharmony_ci which compatible string should be: 7062306a36Sopenharmony_ci "sprd,sc9863a-glbregs", "syscon", "simple-mfd" 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci The 'reg' property for the clock node is also required if there is a sub 7362306a36Sopenharmony_ci range of registers for the clocks. 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ciadditionalProperties: false 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_ciexamples: 7862306a36Sopenharmony_ci - | 7962306a36Sopenharmony_ci ap_clk: clock-controller@21500000 { 8062306a36Sopenharmony_ci compatible = "sprd,sc9863a-ap-clk"; 8162306a36Sopenharmony_ci reg = <0x21500000 0x1000>; 8262306a36Sopenharmony_ci clocks = <&ext_26m>, <&ext_32k>; 8362306a36Sopenharmony_ci clock-names = "ext-26m", "ext-32k"; 8462306a36Sopenharmony_ci #clock-cells = <1>; 8562306a36Sopenharmony_ci }; 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci - | 8862306a36Sopenharmony_ci syscon@20e00000 { 8962306a36Sopenharmony_ci compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd"; 9062306a36Sopenharmony_ci reg = <0x20e00000 0x4000>; 9162306a36Sopenharmony_ci #address-cells = <1>; 9262306a36Sopenharmony_ci #size-cells = <1>; 9362306a36Sopenharmony_ci ranges = <0 0x20e00000 0x4000>; 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci apahb_gate: apahb-gate@0 { 9662306a36Sopenharmony_ci compatible = "sprd,sc9863a-apahb-gate"; 9762306a36Sopenharmony_ci reg = <0x0 0x1020>; 9862306a36Sopenharmony_ci #clock-cells = <1>; 9962306a36Sopenharmony_ci }; 10062306a36Sopenharmony_ci }; 10162306a36Sopenharmony_ci 10262306a36Sopenharmony_ci... 103