162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Rockchip RK3399 Clock and Reset Unit 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Elaine Zhang <zhangqing@rock-chips.com> 1162306a36Sopenharmony_ci - Heiko Stuebner <heiko@sntech.de> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci The RK3399 clock controller generates and supplies clock to various 1562306a36Sopenharmony_ci controllers within the SoC and also implements a reset controller for SoC 1662306a36Sopenharmony_ci peripherals. 1762306a36Sopenharmony_ci Each clock is assigned an identifier and client nodes can use this identifier 1862306a36Sopenharmony_ci to specify the clock which they consume. All available clocks are defined as 1962306a36Sopenharmony_ci preprocessor macros in the dt-bindings/clock/rk3399-cru.h headers and can be 2062306a36Sopenharmony_ci used in device tree sources. Similar macros exist for the reset sources in 2162306a36Sopenharmony_ci these files. 2262306a36Sopenharmony_ci There are several clocks that are generated outside the SoC. It is expected 2362306a36Sopenharmony_ci that they are defined using standard clock bindings with following 2462306a36Sopenharmony_ci clock-output-names: 2562306a36Sopenharmony_ci - "xin24m" - crystal input - required, 2662306a36Sopenharmony_ci - "xin32k" - rtc clock - optional, 2762306a36Sopenharmony_ci - "clkin_gmac" - external GMAC clock - optional, 2862306a36Sopenharmony_ci - "clkin_i2s" - external I2S clock - optional, 2962306a36Sopenharmony_ci - "pclkin_cif" - external ISP clock - optional, 3062306a36Sopenharmony_ci - "clk_usbphy0_480m" - output clock of the pll in the usbphy0 3162306a36Sopenharmony_ci - "clk_usbphy1_480m" - output clock of the pll in the usbphy1 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ciproperties: 3462306a36Sopenharmony_ci compatible: 3562306a36Sopenharmony_ci enum: 3662306a36Sopenharmony_ci - rockchip,rk3399-pmucru 3762306a36Sopenharmony_ci - rockchip,rk3399-cru 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci reg: 4062306a36Sopenharmony_ci maxItems: 1 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci "#clock-cells": 4362306a36Sopenharmony_ci const: 1 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci "#reset-cells": 4662306a36Sopenharmony_ci const: 1 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ci clocks: 4962306a36Sopenharmony_ci maxItems: 1 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci clock-names: 5262306a36Sopenharmony_ci const: xin24m 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci rockchip,grf: 5562306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle 5662306a36Sopenharmony_ci description: 5762306a36Sopenharmony_ci Phandle to the syscon managing the "general register files". It is used 5862306a36Sopenharmony_ci for GRF muxes, if missing any muxes present in the GRF will not be 5962306a36Sopenharmony_ci available. 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_cirequired: 6262306a36Sopenharmony_ci - compatible 6362306a36Sopenharmony_ci - reg 6462306a36Sopenharmony_ci - "#clock-cells" 6562306a36Sopenharmony_ci - "#reset-cells" 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ciadditionalProperties: false 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ciexamples: 7062306a36Sopenharmony_ci - | 7162306a36Sopenharmony_ci pmucru: clock-controller@ff750000 { 7262306a36Sopenharmony_ci compatible = "rockchip,rk3399-pmucru"; 7362306a36Sopenharmony_ci reg = <0xff750000 0x1000>; 7462306a36Sopenharmony_ci #clock-cells = <1>; 7562306a36Sopenharmony_ci #reset-cells = <1>; 7662306a36Sopenharmony_ci }; 7762306a36Sopenharmony_ci - | 7862306a36Sopenharmony_ci cru: clock-controller@ff760000 { 7962306a36Sopenharmony_ci compatible = "rockchip,rk3399-cru"; 8062306a36Sopenharmony_ci reg = <0xff760000 0x1000>; 8162306a36Sopenharmony_ci #clock-cells = <1>; 8262306a36Sopenharmony_ci #reset-cells = <1>; 8362306a36Sopenharmony_ci }; 84