162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Rockchip PX30 Clock and Reset Unit (CRU) 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Elaine Zhang <zhangqing@rock-chips.com> 1162306a36Sopenharmony_ci - Heiko Stuebner <heiko@sntech.de> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci The PX30 clock controller generates and supplies clocks to various 1562306a36Sopenharmony_ci controllers within the SoC and also implements a reset controller for SoC 1662306a36Sopenharmony_ci peripherals. 1762306a36Sopenharmony_ci Each clock is assigned an identifier and client nodes can use this identifier 1862306a36Sopenharmony_ci to specify the clock which they consume. All available clocks are defined as 1962306a36Sopenharmony_ci preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be 2062306a36Sopenharmony_ci used in device tree sources. Similar macros exist for the reset sources in 2162306a36Sopenharmony_ci these files. 2262306a36Sopenharmony_ci There are several clocks that are generated outside the SoC. It is expected 2362306a36Sopenharmony_ci that they are defined using standard clock bindings with following 2462306a36Sopenharmony_ci clock-output-names: 2562306a36Sopenharmony_ci - "xin24m" - crystal input - required 2662306a36Sopenharmony_ci - "xin32k" - rtc clock - optional 2762306a36Sopenharmony_ci - "i2sx_clkin" - external I2S clock - optional 2862306a36Sopenharmony_ci - "gmac_clkin" - external GMAC clock - optional 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ciproperties: 3162306a36Sopenharmony_ci compatible: 3262306a36Sopenharmony_ci enum: 3362306a36Sopenharmony_ci - rockchip,px30-cru 3462306a36Sopenharmony_ci - rockchip,px30-pmucru 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci reg: 3762306a36Sopenharmony_ci maxItems: 1 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci "#clock-cells": 4062306a36Sopenharmony_ci const: 1 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci "#reset-cells": 4362306a36Sopenharmony_ci const: 1 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci clocks: 4662306a36Sopenharmony_ci minItems: 1 4762306a36Sopenharmony_ci items: 4862306a36Sopenharmony_ci - description: Clock for both PMUCRU and CRU 4962306a36Sopenharmony_ci - description: Clock for CRU (sourced from PMUCRU) 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_ci clock-names: 5262306a36Sopenharmony_ci minItems: 1 5362306a36Sopenharmony_ci items: 5462306a36Sopenharmony_ci - const: xin24m 5562306a36Sopenharmony_ci - const: gpll 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci rockchip,grf: 5862306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/phandle 5962306a36Sopenharmony_ci description: 6062306a36Sopenharmony_ci Phandle to the syscon managing the "general register files" (GRF), 6162306a36Sopenharmony_ci if missing pll rates are not changeable, due to the missing pll 6262306a36Sopenharmony_ci lock status. 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_cirequired: 6562306a36Sopenharmony_ci - compatible 6662306a36Sopenharmony_ci - reg 6762306a36Sopenharmony_ci - clocks 6862306a36Sopenharmony_ci - clock-names 6962306a36Sopenharmony_ci - "#clock-cells" 7062306a36Sopenharmony_ci - "#reset-cells" 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ciallOf: 7362306a36Sopenharmony_ci - if: 7462306a36Sopenharmony_ci properties: 7562306a36Sopenharmony_ci compatible: 7662306a36Sopenharmony_ci contains: 7762306a36Sopenharmony_ci const: rockchip,px30-cru 7862306a36Sopenharmony_ci 7962306a36Sopenharmony_ci then: 8062306a36Sopenharmony_ci properties: 8162306a36Sopenharmony_ci clocks: 8262306a36Sopenharmony_ci minItems: 2 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci clock-names: 8562306a36Sopenharmony_ci minItems: 2 8662306a36Sopenharmony_ci 8762306a36Sopenharmony_ci else: 8862306a36Sopenharmony_ci properties: 8962306a36Sopenharmony_ci clocks: 9062306a36Sopenharmony_ci maxItems: 1 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci clock-names: 9362306a36Sopenharmony_ci maxItems: 1 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ciadditionalProperties: false 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ciexamples: 9862306a36Sopenharmony_ci - | 9962306a36Sopenharmony_ci #include <dt-bindings/clock/px30-cru.h> 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci pmucru: clock-controller@ff2bc000 { 10262306a36Sopenharmony_ci compatible = "rockchip,px30-pmucru"; 10362306a36Sopenharmony_ci reg = <0xff2bc000 0x1000>; 10462306a36Sopenharmony_ci clocks = <&xin24m>; 10562306a36Sopenharmony_ci clock-names = "xin24m"; 10662306a36Sopenharmony_ci rockchip,grf = <&grf>; 10762306a36Sopenharmony_ci #clock-cells = <1>; 10862306a36Sopenharmony_ci #reset-cells = <1>; 10962306a36Sopenharmony_ci }; 11062306a36Sopenharmony_ci 11162306a36Sopenharmony_ci cru: clock-controller@ff2b0000 { 11262306a36Sopenharmony_ci compatible = "rockchip,px30-cru"; 11362306a36Sopenharmony_ci reg = <0xff2b0000 0x1000>; 11462306a36Sopenharmony_ci clocks = <&xin24m>, <&pmucru PLL_GPLL>; 11562306a36Sopenharmony_ci clock-names = "xin24m", "gpll"; 11662306a36Sopenharmony_ci rockchip,grf = <&grf>; 11762306a36Sopenharmony_ci #clock-cells = <1>; 11862306a36Sopenharmony_ci #reset-cells = <1>; 11962306a36Sopenharmony_ci }; 120