162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Qualcomm Graphics Clock & Reset Controller on SM6115
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Konrad Dybcio <konrad.dybcio@linaro.org>
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_cidescription: |
1362306a36Sopenharmony_ci  Qualcomm graphics clock control module provides clocks, resets and power
1462306a36Sopenharmony_ci  domains on Qualcomm SoCs.
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ci  See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_ciproperties:
1962306a36Sopenharmony_ci  compatible:
2062306a36Sopenharmony_ci    enum:
2162306a36Sopenharmony_ci      - qcom,sm6115-gpucc
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  clocks:
2462306a36Sopenharmony_ci    items:
2562306a36Sopenharmony_ci      - description: Board XO source
2662306a36Sopenharmony_ci      - description: GPLL0 main branch source
2762306a36Sopenharmony_ci      - description: GPLL0 main div source
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_cirequired:
3062306a36Sopenharmony_ci  - compatible
3162306a36Sopenharmony_ci  - clocks
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ciallOf:
3462306a36Sopenharmony_ci  - $ref: qcom,gcc.yaml#
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ciunevaluatedProperties: false
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ciexamples:
3962306a36Sopenharmony_ci  - |
4062306a36Sopenharmony_ci    #include <dt-bindings/clock/qcom,gcc-sm6115.h>
4162306a36Sopenharmony_ci    #include <dt-bindings/clock/qcom,rpmcc.h>
4262306a36Sopenharmony_ci
4362306a36Sopenharmony_ci    soc {
4462306a36Sopenharmony_ci        #address-cells = <1>;
4562306a36Sopenharmony_ci        #size-cells = <1>;
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci        clock-controller@5990000 {
4862306a36Sopenharmony_ci            compatible = "qcom,sm6115-gpucc";
4962306a36Sopenharmony_ci            reg = <0x05990000 0x9000>;
5062306a36Sopenharmony_ci            clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
5162306a36Sopenharmony_ci                     <&gcc GCC_GPU_GPLL0_CLK_SRC>,
5262306a36Sopenharmony_ci                     <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
5362306a36Sopenharmony_ci            #clock-cells = <1>;
5462306a36Sopenharmony_ci            #reset-cells = <1>;
5562306a36Sopenharmony_ci            #power-domain-cells = <1>;
5662306a36Sopenharmony_ci        };
5762306a36Sopenharmony_ci    };
5862306a36Sopenharmony_ci...
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