162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,sdx75-gcc.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm Global Clock & Reset Controller on SDX75 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Imran Shaik <quic_imrashai@quicinc.com> 1162306a36Sopenharmony_ci - Taniya Das <quic_tdas@quicinc.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci Qualcomm global clock control module provides the clocks, resets and power 1562306a36Sopenharmony_ci domains on SDX75 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci See also:: include/dt-bindings/clock/qcom,sdx75-gcc.h 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciproperties: 2062306a36Sopenharmony_ci compatible: 2162306a36Sopenharmony_ci const: qcom,sdx75-gcc 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci clocks: 2462306a36Sopenharmony_ci items: 2562306a36Sopenharmony_ci - description: Board XO source 2662306a36Sopenharmony_ci - description: Sleep clock source 2762306a36Sopenharmony_ci - description: EMAC0 sgmiiphy mac rclk source 2862306a36Sopenharmony_ci - description: EMAC0 sgmiiphy mac tclk source 2962306a36Sopenharmony_ci - description: EMAC0 sgmiiphy rclk source 3062306a36Sopenharmony_ci - description: EMAC0 sgmiiphy tclk source 3162306a36Sopenharmony_ci - description: EMAC1 sgmiiphy mac rclk source 3262306a36Sopenharmony_ci - description: EMAC1 sgmiiphy mac tclk source 3362306a36Sopenharmony_ci - description: EMAC1 sgmiiphy rclk source 3462306a36Sopenharmony_ci - description: EMAC1 sgmiiphy tclk source 3562306a36Sopenharmony_ci - description: PCIE20 phy aux clock source 3662306a36Sopenharmony_ci - description: PCIE_1 Pipe clock source 3762306a36Sopenharmony_ci - description: PCIE_2 Pipe clock source 3862306a36Sopenharmony_ci - description: PCIE Pipe clock source 3962306a36Sopenharmony_ci - description: USB3 phy wrapper pipe clock source 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_cirequired: 4262306a36Sopenharmony_ci - compatible 4362306a36Sopenharmony_ci - clocks 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ciallOf: 4662306a36Sopenharmony_ci - $ref: qcom,gcc.yaml# 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_ciunevaluatedProperties: false 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ciexamples: 5162306a36Sopenharmony_ci - | 5262306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,rpmh.h> 5362306a36Sopenharmony_ci clock-controller@80000 { 5462306a36Sopenharmony_ci compatible = "qcom,sdx75-gcc"; 5562306a36Sopenharmony_ci reg = <0x80000 0x1f7400>; 5662306a36Sopenharmony_ci clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>, <&emac0_sgmiiphy_mac_rclk>, 5762306a36Sopenharmony_ci <&emac0_sgmiiphy_mac_tclk>, <&emac0_sgmiiphy_rclk>, <&emac0_sgmiiphy_tclk>, 5862306a36Sopenharmony_ci <&emac1_sgmiiphy_mac_rclk>, <&emac1_sgmiiphy_mac_tclk>, <&emac1_sgmiiphy_rclk>, 5962306a36Sopenharmony_ci <&emac1_sgmiiphy_tclk>, <&pcie20_phy_aux_clk>, <&pcie_1_pipe_clk>, 6062306a36Sopenharmony_ci <&pcie_2_pipe_clk>, <&pcie_pipe_clk>, <&usb3_phy_wrapper_gcc_usb30_pipe_clk>; 6162306a36Sopenharmony_ci #clock-cells = <1>; 6262306a36Sopenharmony_ci #reset-cells = <1>; 6362306a36Sopenharmony_ci #power-domain-cells = <1>; 6462306a36Sopenharmony_ci }; 6562306a36Sopenharmony_ci... 66