162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,qdu1000-gcc.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Qualcomm Global Clock & Reset Controller for QDU1000 and QRU1000
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Taniya Das <quic_tdas@quicinc.com>
1162306a36Sopenharmony_ci  - Imran Shaik <quic_imrashai@quicinc.com>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cidescription: |
1462306a36Sopenharmony_ci  Qualcomm global clock control module which supports the clocks, resets and
1562306a36Sopenharmony_ci  power domains on QDU1000 and QRU1000
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ci  See also:: include/dt-bindings/clock/qcom,qdu1000-gcc.h
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ciproperties:
2062306a36Sopenharmony_ci  compatible:
2162306a36Sopenharmony_ci    const: qcom,qdu1000-gcc
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ci  clocks:
2462306a36Sopenharmony_ci    items:
2562306a36Sopenharmony_ci      - description: Board XO source
2662306a36Sopenharmony_ci      - description: Sleep clock source
2762306a36Sopenharmony_ci      - description: PCIE 0 Pipe clock source
2862306a36Sopenharmony_ci      - description: PCIE 0 Phy Auxiliary clock source
2962306a36Sopenharmony_ci      - description: USB3 Phy wrapper pipe clock source
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_cirequired:
3262306a36Sopenharmony_ci  - compatible
3362306a36Sopenharmony_ci  - clocks
3462306a36Sopenharmony_ci
3562306a36Sopenharmony_ciallOf:
3662306a36Sopenharmony_ci  - $ref: qcom,gcc.yaml#
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ciunevaluatedProperties: false
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ciexamples:
4162306a36Sopenharmony_ci  - |
4262306a36Sopenharmony_ci    #include <dt-bindings/clock/qcom,rpmh.h>
4362306a36Sopenharmony_ci    clock-controller@100000 {
4462306a36Sopenharmony_ci      compatible = "qcom,qdu1000-gcc";
4562306a36Sopenharmony_ci      reg = <0x00100000 0x001f4200>;
4662306a36Sopenharmony_ci      clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>,
4762306a36Sopenharmony_ci               <&pcie_0_pipe_clk>, <&pcie_0_phy_aux_clk>,
4862306a36Sopenharmony_ci               <&usb3_phy_wrapper_pipe_clk>;
4962306a36Sopenharmony_ci      #clock-cells = <1>;
5062306a36Sopenharmony_ci      #reset-cells = <1>;
5162306a36Sopenharmony_ci      #power-domain-cells = <1>;
5262306a36Sopenharmony_ci    };
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