162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm Graphics Clock & Reset Controller on MSM8998 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Taniya Das <quic_tdas@quicinc.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci Qualcomm graphics clock control module provides the clocks, resets and power 1462306a36Sopenharmony_ci domains on MSM8998. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ciproperties: 1962306a36Sopenharmony_ci compatible: 2062306a36Sopenharmony_ci const: qcom,msm8998-gpucc 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci clocks: 2362306a36Sopenharmony_ci items: 2462306a36Sopenharmony_ci - description: Board XO source 2562306a36Sopenharmony_ci - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src) 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci clock-names: 2862306a36Sopenharmony_ci items: 2962306a36Sopenharmony_ci - const: xo 3062306a36Sopenharmony_ci - const: gpll0 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ci '#clock-cells': 3362306a36Sopenharmony_ci const: 1 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci '#reset-cells': 3662306a36Sopenharmony_ci const: 1 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci '#power-domain-cells': 3962306a36Sopenharmony_ci const: 1 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci reg: 4262306a36Sopenharmony_ci maxItems: 1 4362306a36Sopenharmony_ci 4462306a36Sopenharmony_cirequired: 4562306a36Sopenharmony_ci - compatible 4662306a36Sopenharmony_ci - reg 4762306a36Sopenharmony_ci - clocks 4862306a36Sopenharmony_ci - clock-names 4962306a36Sopenharmony_ci - '#clock-cells' 5062306a36Sopenharmony_ci - '#reset-cells' 5162306a36Sopenharmony_ci - '#power-domain-cells' 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ciadditionalProperties: false 5462306a36Sopenharmony_ci 5562306a36Sopenharmony_ciexamples: 5662306a36Sopenharmony_ci - | 5762306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,gcc-msm8998.h> 5862306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,rpmcc.h> 5962306a36Sopenharmony_ci clock-controller@5065000 { 6062306a36Sopenharmony_ci compatible = "qcom,msm8998-gpucc"; 6162306a36Sopenharmony_ci #clock-cells = <1>; 6262306a36Sopenharmony_ci #reset-cells = <1>; 6362306a36Sopenharmony_ci #power-domain-cells = <1>; 6462306a36Sopenharmony_ci reg = <0x05065000 0x9000>; 6562306a36Sopenharmony_ci clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0_OUT_MAIN>; 6662306a36Sopenharmony_ci clock-names = "xo", "gpll0"; 6762306a36Sopenharmony_ci }; 6862306a36Sopenharmony_ci... 69