162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v1 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Christian Marangi <ansuelsmth@gmail.com> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: 1362306a36Sopenharmony_ci The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. 1462306a36Sopenharmony_ci There is one ACC register region per CPU within the KPSS remapped region as 1562306a36Sopenharmony_ci well as an alias register region that remaps accesses to the ACC associated 1662306a36Sopenharmony_ci with the CPU accessing the region. ACC v1 is currently used as a 1762306a36Sopenharmony_ci clock-controller for enabling the cpu and handling the aux clocks. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciproperties: 2062306a36Sopenharmony_ci compatible: 2162306a36Sopenharmony_ci const: qcom,kpss-acc-v1 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci reg: 2462306a36Sopenharmony_ci items: 2562306a36Sopenharmony_ci - description: Base address and size of the register region 2662306a36Sopenharmony_ci - description: Optional base address and size of the alias register region 2762306a36Sopenharmony_ci minItems: 1 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci clocks: 3062306a36Sopenharmony_ci minItems: 2 3162306a36Sopenharmony_ci maxItems: 2 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci clock-names: 3462306a36Sopenharmony_ci items: 3562306a36Sopenharmony_ci - const: pll8_vote 3662306a36Sopenharmony_ci - const: pxo 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci clock-output-names: 3962306a36Sopenharmony_ci description: Name of the aux clock. Krait can have at most 4 cpu. 4062306a36Sopenharmony_ci enum: 4162306a36Sopenharmony_ci - acpu0_aux 4262306a36Sopenharmony_ci - acpu1_aux 4362306a36Sopenharmony_ci - acpu2_aux 4462306a36Sopenharmony_ci - acpu3_aux 4562306a36Sopenharmony_ci 4662306a36Sopenharmony_ci '#clock-cells': 4762306a36Sopenharmony_ci const: 0 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_cirequired: 5062306a36Sopenharmony_ci - compatible 5162306a36Sopenharmony_ci - reg 5262306a36Sopenharmony_ci - clocks 5362306a36Sopenharmony_ci - clock-names 5462306a36Sopenharmony_ci - clock-output-names 5562306a36Sopenharmony_ci - '#clock-cells' 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ciadditionalProperties: false 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ciexamples: 6062306a36Sopenharmony_ci - | 6162306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci clock-controller@2088000 { 6462306a36Sopenharmony_ci compatible = "qcom,kpss-acc-v1"; 6562306a36Sopenharmony_ci reg = <0x02088000 0x1000>, <0x02008000 0x1000>; 6662306a36Sopenharmony_ci clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 6762306a36Sopenharmony_ci clock-names = "pll8_vote", "pxo"; 6862306a36Sopenharmony_ci clock-output-names = "acpu0_aux"; 6962306a36Sopenharmony_ci #clock-cells = <0>; 7062306a36Sopenharmony_ci }; 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci... 73