162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm Global Clock & Reset Controller on IPQ5332 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Bjorn Andersson <andersson@kernel.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci Qualcomm global clock control module provides the clocks, resets and power 1462306a36Sopenharmony_ci domains on IPQ5332. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ciallOf: 1962306a36Sopenharmony_ci - $ref: qcom,gcc.yaml# 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciproperties: 2262306a36Sopenharmony_ci compatible: 2362306a36Sopenharmony_ci const: qcom,ipq5332-gcc 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ci clocks: 2662306a36Sopenharmony_ci items: 2762306a36Sopenharmony_ci - description: Board XO clock source 2862306a36Sopenharmony_ci - description: Sleep clock source 2962306a36Sopenharmony_ci - description: PCIE 2lane PHY pipe clock source 3062306a36Sopenharmony_ci - description: PCIE 2lane x1 PHY pipe clock source (For second lane) 3162306a36Sopenharmony_ci - description: USB PCIE wrapper pipe clock source 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_cirequired: 3462306a36Sopenharmony_ci - compatible 3562306a36Sopenharmony_ci - clocks 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ciunevaluatedProperties: false 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ciexamples: 4062306a36Sopenharmony_ci - | 4162306a36Sopenharmony_ci clock-controller@1800000 { 4262306a36Sopenharmony_ci compatible = "qcom,ipq5332-gcc"; 4362306a36Sopenharmony_ci reg = <0x01800000 0x80000>; 4462306a36Sopenharmony_ci clocks = <&xo_board>, 4562306a36Sopenharmony_ci <&sleep_clk>, 4662306a36Sopenharmony_ci <&pcie_2lane_phy_pipe_clk>, 4762306a36Sopenharmony_ci <&pcie_2lane_phy_pipe_clk_x1>, 4862306a36Sopenharmony_ci <&usb_pcie_wrapper_pipe_clk>; 4962306a36Sopenharmony_ci #clock-cells = <1>; 5062306a36Sopenharmony_ci #power-domain-cells = <1>; 5162306a36Sopenharmony_ci #reset-cells = <1>; 5262306a36Sopenharmony_ci }; 5362306a36Sopenharmony_ci... 54