162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm Graphics Clock & Reset Controller on SDM630 and SDM660 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci Qualcomm graphics clock control module provides the clocks, resets and 1462306a36Sopenharmony_ci power domains on SDM630 and SDM660. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci See also dt-bindings/clock/qcom,gpucc-sdm660.h. 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ciproperties: 1962306a36Sopenharmony_ci compatible: 2062306a36Sopenharmony_ci enum: 2162306a36Sopenharmony_ci - qcom,gpucc-sdm630 2262306a36Sopenharmony_ci - qcom,gpucc-sdm660 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci clocks: 2562306a36Sopenharmony_ci items: 2662306a36Sopenharmony_ci - description: Board XO source 2762306a36Sopenharmony_ci - description: GPLL0 main gpu branch 2862306a36Sopenharmony_ci - description: GPLL0 divider gpu branch 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci clock-names: 3162306a36Sopenharmony_ci items: 3262306a36Sopenharmony_ci - const: xo 3362306a36Sopenharmony_ci - const: gcc_gpu_gpll0_clk 3462306a36Sopenharmony_ci - const: gcc_gpu_gpll0_div_clk 3562306a36Sopenharmony_ci 3662306a36Sopenharmony_ci '#clock-cells': 3762306a36Sopenharmony_ci const: 1 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci '#reset-cells': 4062306a36Sopenharmony_ci const: 1 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci '#power-domain-cells': 4362306a36Sopenharmony_ci const: 1 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci reg: 4662306a36Sopenharmony_ci maxItems: 1 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_cirequired: 4962306a36Sopenharmony_ci - compatible 5062306a36Sopenharmony_ci - reg 5162306a36Sopenharmony_ci - clocks 5262306a36Sopenharmony_ci - clock-names 5362306a36Sopenharmony_ci - '#clock-cells' 5462306a36Sopenharmony_ci - '#reset-cells' 5562306a36Sopenharmony_ci - '#power-domain-cells' 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ciadditionalProperties: false 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ciexamples: 6062306a36Sopenharmony_ci - | 6162306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,gcc-sdm660.h> 6262306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,rpmcc.h> 6362306a36Sopenharmony_ci 6462306a36Sopenharmony_ci clock-controller@5065000 { 6562306a36Sopenharmony_ci compatible = "qcom,gpucc-sdm660"; 6662306a36Sopenharmony_ci reg = <0x05065000 0x9038>; 6762306a36Sopenharmony_ci clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 6862306a36Sopenharmony_ci <&gcc GCC_GPU_GPLL0_CLK>, 6962306a36Sopenharmony_ci <&gcc GCC_GPU_GPLL0_DIV_CLK>; 7062306a36Sopenharmony_ci clock-names = "xo", "gcc_gpu_gpll0_clk", 7162306a36Sopenharmony_ci "gcc_gpu_gpll0_div_clk"; 7262306a36Sopenharmony_ci #clock-cells = <1>; 7362306a36Sopenharmony_ci #power-domain-cells = <1>; 7462306a36Sopenharmony_ci #reset-cells = <1>; 7562306a36Sopenharmony_ci }; 7662306a36Sopenharmony_ci... 77