162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm Global Clock & Reset Controller on SM8450 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Vinod Koul <vkoul@kernel.org> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci Qualcomm global clock control module provides the clocks, resets and power 1462306a36Sopenharmony_ci domains on SM8450 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h 1762306a36Sopenharmony_ci 1862306a36Sopenharmony_ciproperties: 1962306a36Sopenharmony_ci compatible: 2062306a36Sopenharmony_ci const: qcom,gcc-sm8450 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci clocks: 2362306a36Sopenharmony_ci items: 2462306a36Sopenharmony_ci - description: Board XO source 2562306a36Sopenharmony_ci - description: Sleep clock source 2662306a36Sopenharmony_ci - description: PCIE 0 Pipe clock source (Optional clock) 2762306a36Sopenharmony_ci - description: PCIE 1 Pipe clock source (Optional clock) 2862306a36Sopenharmony_ci - description: PCIE 1 Phy Auxiliary clock source (Optional clock) 2962306a36Sopenharmony_ci - description: UFS Phy Rx symbol 0 clock source (Optional clock) 3062306a36Sopenharmony_ci - description: UFS Phy Rx symbol 1 clock source (Optional clock) 3162306a36Sopenharmony_ci - description: UFS Phy Tx symbol 0 clock source (Optional clock) 3262306a36Sopenharmony_ci - description: USB3 Phy wrapper pipe clock source (Optional clock) 3362306a36Sopenharmony_ci minItems: 2 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ci clock-names: 3662306a36Sopenharmony_ci items: 3762306a36Sopenharmony_ci - const: bi_tcxo 3862306a36Sopenharmony_ci - const: sleep_clk 3962306a36Sopenharmony_ci - const: pcie_0_pipe_clk # Optional clock 4062306a36Sopenharmony_ci - const: pcie_1_pipe_clk # Optional clock 4162306a36Sopenharmony_ci - const: pcie_1_phy_aux_clk # Optional clock 4262306a36Sopenharmony_ci - const: ufs_phy_rx_symbol_0_clk # Optional clock 4362306a36Sopenharmony_ci - const: ufs_phy_rx_symbol_1_clk # Optional clock 4462306a36Sopenharmony_ci - const: ufs_phy_tx_symbol_0_clk # Optional clock 4562306a36Sopenharmony_ci - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock 4662306a36Sopenharmony_ci minItems: 2 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_cirequired: 4962306a36Sopenharmony_ci - compatible 5062306a36Sopenharmony_ci - clocks 5162306a36Sopenharmony_ci - clock-names 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ciallOf: 5462306a36Sopenharmony_ci - $ref: qcom,gcc.yaml# 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ciunevaluatedProperties: false 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ciexamples: 5962306a36Sopenharmony_ci - | 6062306a36Sopenharmony_ci #include <dt-bindings/clock/qcom,rpmh.h> 6162306a36Sopenharmony_ci clock-controller@100000 { 6262306a36Sopenharmony_ci compatible = "qcom,gcc-sm8450"; 6362306a36Sopenharmony_ci reg = <0x00100000 0x001f4200>; 6462306a36Sopenharmony_ci clocks = <&rpmhcc RPMH_CXO_CLK>, <&sleep_clk>; 6562306a36Sopenharmony_ci clock-names = "bi_tcxo", "sleep_clk"; 6662306a36Sopenharmony_ci #clock-cells = <1>; 6762306a36Sopenharmony_ci #reset-cells = <1>; 6862306a36Sopenharmony_ci #power-domain-cells = <1>; 6962306a36Sopenharmony_ci }; 7062306a36Sopenharmony_ci 7162306a36Sopenharmony_ci... 72