162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Qualcomm Global Clock & Reset Controller on MSM8996 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Stephen Boyd <sboyd@kernel.org> 1162306a36Sopenharmony_ci - Taniya Das <quic_tdas@quicinc.com> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cidescription: | 1462306a36Sopenharmony_ci Qualcomm global clock control module which provides the clocks, resets and 1562306a36Sopenharmony_ci power domains on MSM8996. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ci See also:: include/dt-bindings/clock/qcom,gcc-msm8996.h 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciproperties: 2062306a36Sopenharmony_ci compatible: 2162306a36Sopenharmony_ci const: qcom,gcc-msm8996 2262306a36Sopenharmony_ci 2362306a36Sopenharmony_ci clocks: 2462306a36Sopenharmony_ci minItems: 3 2562306a36Sopenharmony_ci items: 2662306a36Sopenharmony_ci - description: XO source 2762306a36Sopenharmony_ci - description: Second XO source 2862306a36Sopenharmony_ci - description: Sleep clock source 2962306a36Sopenharmony_ci - description: PCIe 0 PIPE clock (optional) 3062306a36Sopenharmony_ci - description: PCIe 1 PIPE clock (optional) 3162306a36Sopenharmony_ci - description: PCIe 2 PIPE clock (optional) 3262306a36Sopenharmony_ci - description: USB3 PIPE clock (optional) 3362306a36Sopenharmony_ci - description: UFS RX symbol 0 clock (optional) 3462306a36Sopenharmony_ci - description: UFS RX symbol 1 clock (optional) 3562306a36Sopenharmony_ci - description: UFS TX symbol 0 clock (optional) 3662306a36Sopenharmony_ci 3762306a36Sopenharmony_ci clock-names: 3862306a36Sopenharmony_ci minItems: 3 3962306a36Sopenharmony_ci items: 4062306a36Sopenharmony_ci - const: cxo 4162306a36Sopenharmony_ci - const: cxo2 4262306a36Sopenharmony_ci - const: sleep_clk 4362306a36Sopenharmony_ci - const: pcie_0_pipe_clk_src 4462306a36Sopenharmony_ci - const: pcie_1_pipe_clk_src 4562306a36Sopenharmony_ci - const: pcie_2_pipe_clk_src 4662306a36Sopenharmony_ci - const: usb3_phy_pipe_clk_src 4762306a36Sopenharmony_ci - const: ufs_rx_symbol_0_clk_src 4862306a36Sopenharmony_ci - const: ufs_rx_symbol_1_clk_src 4962306a36Sopenharmony_ci - const: ufs_tx_symbol_0_clk_src 5062306a36Sopenharmony_ci 5162306a36Sopenharmony_cirequired: 5262306a36Sopenharmony_ci - compatible 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ciallOf: 5562306a36Sopenharmony_ci - $ref: qcom,gcc.yaml# 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ciunevaluatedProperties: false 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ciexamples: 6062306a36Sopenharmony_ci - | 6162306a36Sopenharmony_ci clock-controller@300000 { 6262306a36Sopenharmony_ci compatible = "qcom,gcc-msm8996"; 6362306a36Sopenharmony_ci #clock-cells = <1>; 6462306a36Sopenharmony_ci #reset-cells = <1>; 6562306a36Sopenharmony_ci #power-domain-cells = <1>; 6662306a36Sopenharmony_ci reg = <0x300000 0x90000>; 6762306a36Sopenharmony_ci }; 6862306a36Sopenharmony_ci... 69