162306a36Sopenharmony_ciBinding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller 262306a36Sopenharmony_ci 362306a36Sopenharmony_ciThe PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. 462306a36Sopenharmony_ci 562306a36Sopenharmony_ciRequired Properties: 662306a36Sopenharmony_ci- compatible: has to be "qca,<soctype>-pll" and one of the following 762306a36Sopenharmony_ci fallbacks: 862306a36Sopenharmony_ci - "qca,ar7100-pll" 962306a36Sopenharmony_ci - "qca,ar7240-pll" 1062306a36Sopenharmony_ci - "qca,ar9130-pll" 1162306a36Sopenharmony_ci - "qca,ar9330-pll" 1262306a36Sopenharmony_ci - "qca,ar9340-pll" 1362306a36Sopenharmony_ci - "qca,qca9550-pll" 1462306a36Sopenharmony_ci- reg: Base address and size of the controllers memory area 1562306a36Sopenharmony_ci- clock-names: Name of the input clock, has to be "ref" 1662306a36Sopenharmony_ci- clocks: phandle of the external reference clock 1762306a36Sopenharmony_ci- #clock-cells: has to be one 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ciOptional properties: 2062306a36Sopenharmony_ci- clock-output-names: should be "cpu", "ddr", "ahb" 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ciExample: 2362306a36Sopenharmony_ci 2462306a36Sopenharmony_ci pll-controller@18050000 { 2562306a36Sopenharmony_ci compatible = "qca,ar9132-pll", "qca,ar9130-pll"; 2662306a36Sopenharmony_ci reg = <0x18050000 0x20>; 2762306a36Sopenharmony_ci 2862306a36Sopenharmony_ci clock-names = "ref"; 2962306a36Sopenharmony_ci clocks = <&extosc>; 3062306a36Sopenharmony_ci 3162306a36Sopenharmony_ci #clock-cells = <1>; 3262306a36Sopenharmony_ci clock-output-names = "cpu", "ddr", "ahb"; 3362306a36Sopenharmony_ci }; 34