162306a36Sopenharmony_ci* Nuvoton NPCM7XX Clock Controller
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciNuvoton Poleg BMC NPCM7XX contains an integrated clock controller, which
462306a36Sopenharmony_cigenerates and supplies clocks to all modules within the BMC.
562306a36Sopenharmony_ci
662306a36Sopenharmony_ciExternal clocks:
762306a36Sopenharmony_ci
862306a36Sopenharmony_ciThere are six fixed clocks that are generated outside the BMC. All clocks are of
962306a36Sopenharmony_cia known fixed value that cannot be changed. clk_refclk, clk_mcbypck and
1062306a36Sopenharmony_ciclk_sysbypck are inputs to the clock controller.
1162306a36Sopenharmony_ciclk_rg1refck, clk_rg2refck and clk_xin are external clocks suppling the
1262306a36Sopenharmony_cinetwork. They are set on the device tree, but not used by the clock module. The
1362306a36Sopenharmony_cinetwork devices use them directly.
1462306a36Sopenharmony_ciExample can be found below.
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciAll available clocks are defined as preprocessor macros in:
1762306a36Sopenharmony_cidt-bindings/clock/nuvoton,npcm7xx-clock.h
1862306a36Sopenharmony_ciand can be reused as DT sources.
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciRequired Properties of clock controller:
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ci	- compatible: "nuvoton,npcm750-clk" : for clock controller of Nuvoton
2362306a36Sopenharmony_ci		  Poleg BMC NPCM750
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ci	- reg: physical base address of the clock controller and length of
2662306a36Sopenharmony_ci		memory mapped region.
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_ci	- #clock-cells: should be 1.
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ciExample: Clock controller node:
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ci	clk: clock-controller@f0801000 {
3362306a36Sopenharmony_ci		compatible = "nuvoton,npcm750-clk";
3462306a36Sopenharmony_ci		#clock-cells = <1>;
3562306a36Sopenharmony_ci		reg = <0xf0801000 0x1000>;
3662306a36Sopenharmony_ci		clock-names = "refclk", "sysbypck", "mcbypck";
3762306a36Sopenharmony_ci		clocks = <&clk_refclk>, <&clk_sysbypck>, <&clk_mcbypck>;
3862306a36Sopenharmony_ci	};
3962306a36Sopenharmony_ci
4062306a36Sopenharmony_ciExample: Required external clocks for network:
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci	/* external reference clock */
4362306a36Sopenharmony_ci	clk_refclk: clk-refclk {
4462306a36Sopenharmony_ci		compatible = "fixed-clock";
4562306a36Sopenharmony_ci		#clock-cells = <0>;
4662306a36Sopenharmony_ci		clock-frequency = <25000000>;
4762306a36Sopenharmony_ci		clock-output-names = "refclk";
4862306a36Sopenharmony_ci	};
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci	/* external reference clock for cpu. float in normal operation */
5162306a36Sopenharmony_ci	clk_sysbypck: clk-sysbypck {
5262306a36Sopenharmony_ci		compatible = "fixed-clock";
5362306a36Sopenharmony_ci		#clock-cells = <0>;
5462306a36Sopenharmony_ci		clock-frequency = <800000000>;
5562306a36Sopenharmony_ci		clock-output-names = "sysbypck";
5662306a36Sopenharmony_ci	};
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ci	/* external reference clock for MC. float in normal operation */
5962306a36Sopenharmony_ci	clk_mcbypck: clk-mcbypck {
6062306a36Sopenharmony_ci		compatible = "fixed-clock";
6162306a36Sopenharmony_ci		#clock-cells = <0>;
6262306a36Sopenharmony_ci		clock-frequency = <800000000>;
6362306a36Sopenharmony_ci		clock-output-names = "mcbypck";
6462306a36Sopenharmony_ci	};
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci	 /* external clock signal rg1refck, supplied by the phy */
6762306a36Sopenharmony_ci	clk_rg1refck: clk-rg1refck {
6862306a36Sopenharmony_ci		compatible = "fixed-clock";
6962306a36Sopenharmony_ci		#clock-cells = <0>;
7062306a36Sopenharmony_ci		clock-frequency = <125000000>;
7162306a36Sopenharmony_ci		clock-output-names = "clk_rg1refck";
7262306a36Sopenharmony_ci	};
7362306a36Sopenharmony_ci
7462306a36Sopenharmony_ci	 /* external clock signal rg2refck, supplied by the phy */
7562306a36Sopenharmony_ci	clk_rg2refck: clk-rg2refck {
7662306a36Sopenharmony_ci		compatible = "fixed-clock";
7762306a36Sopenharmony_ci		#clock-cells = <0>;
7862306a36Sopenharmony_ci		clock-frequency = <125000000>;
7962306a36Sopenharmony_ci		clock-output-names = "clk_rg2refck";
8062306a36Sopenharmony_ci	};
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ci	clk_xin: clk-xin {
8362306a36Sopenharmony_ci		compatible = "fixed-clock";
8462306a36Sopenharmony_ci		#clock-cells = <0>;
8562306a36Sopenharmony_ci		clock-frequency = <50000000>;
8662306a36Sopenharmony_ci		clock-output-names = "clk_xin";
8762306a36Sopenharmony_ci	};
8862306a36Sopenharmony_ci
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ciExample: GMAC controller node that consumes two clocks: a generated clk by the
9162306a36Sopenharmony_ciclock controller and a fixed clock from DT (clk_rg1refck).
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_ci	ethernet0: ethernet@f0802000 {
9462306a36Sopenharmony_ci		compatible = "snps,dwmac";
9562306a36Sopenharmony_ci		reg = <0xf0802000 0x2000>;
9662306a36Sopenharmony_ci		interrupts = <0 14 4>;
9762306a36Sopenharmony_ci		interrupt-names = "macirq";
9862306a36Sopenharmony_ci		clocks	= <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>;
9962306a36Sopenharmony_ci		clock-names = "stmmaceth", "clk_gmac";
10062306a36Sopenharmony_ci	};
101