162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Marvell MMP2 and MMP3 Clock Controller 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Lubomir Rintel <lkundrak@v3.sk> 1162306a36Sopenharmony_ci 1262306a36Sopenharmony_cidescription: | 1362306a36Sopenharmony_ci The clock subsystem on MMP2 or MMP3 generates and supplies clock to various 1462306a36Sopenharmony_ci controllers within the SoC. 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci Each clock is assigned an identifier and client nodes use this identifier 1762306a36Sopenharmony_ci to specify the clock which they consume. 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>. 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ciproperties: 2262306a36Sopenharmony_ci compatible: 2362306a36Sopenharmony_ci enum: 2462306a36Sopenharmony_ci - marvell,mmp2-clock # controller compatible with MMP2 SoC 2562306a36Sopenharmony_ci - marvell,mmp3-clock # controller compatible with MMP3 SoC 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ci reg: 2862306a36Sopenharmony_ci items: 2962306a36Sopenharmony_ci - description: MPMU register region 3062306a36Sopenharmony_ci - description: APMU register region 3162306a36Sopenharmony_ci - description: APBC register region 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci reg-names: 3462306a36Sopenharmony_ci items: 3562306a36Sopenharmony_ci - const: mpmu 3662306a36Sopenharmony_ci - const: apmu 3762306a36Sopenharmony_ci - const: apbc 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci '#clock-cells': 4062306a36Sopenharmony_ci const: 1 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_ci '#reset-cells': 4362306a36Sopenharmony_ci const: 1 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci '#power-domain-cells': 4662306a36Sopenharmony_ci const: 1 4762306a36Sopenharmony_ci 4862306a36Sopenharmony_cirequired: 4962306a36Sopenharmony_ci - compatible 5062306a36Sopenharmony_ci - reg 5162306a36Sopenharmony_ci - reg-names 5262306a36Sopenharmony_ci - '#clock-cells' 5362306a36Sopenharmony_ci - '#reset-cells' 5462306a36Sopenharmony_ci - '#power-domain-cells' 5562306a36Sopenharmony_ci 5662306a36Sopenharmony_ciadditionalProperties: false 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ciexamples: 5962306a36Sopenharmony_ci - | 6062306a36Sopenharmony_ci clock-controller@d4050000 { 6162306a36Sopenharmony_ci compatible = "marvell,mmp2-clock"; 6262306a36Sopenharmony_ci reg = <0xd4050000 0x1000>, 6362306a36Sopenharmony_ci <0xd4282800 0x400>, 6462306a36Sopenharmony_ci <0xd4015000 0x1000>; 6562306a36Sopenharmony_ci reg-names = "mpmu", "apmu", "apbc"; 6662306a36Sopenharmony_ci #clock-cells = <1>; 6762306a36Sopenharmony_ci #reset-cells = <1>; 6862306a36Sopenharmony_ci #power-domain-cells = <1>; 6962306a36Sopenharmony_ci }; 70