162306a36Sopenharmony_ci# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: IDT VersaClock 5 and 6 programmable I2C clock generators 862306a36Sopenharmony_ci 962306a36Sopenharmony_cidescription: | 1062306a36Sopenharmony_ci The IDT VersaClock 5 and VersaClock 6 are programmable I2C 1162306a36Sopenharmony_ci clock generators providing from 3 to 12 output clocks. 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_ci When referencing the provided clock in the DT using phandle and clock 1462306a36Sopenharmony_ci specifier, the following mapping applies: 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ci - 5P49V5923: 1762306a36Sopenharmony_ci 0 -- OUT0_SEL_I2CB 1862306a36Sopenharmony_ci 1 -- OUT1 1962306a36Sopenharmony_ci 2 -- OUT2 2062306a36Sopenharmony_ci 2162306a36Sopenharmony_ci - 5P49V5933: 2262306a36Sopenharmony_ci 0 -- OUT0_SEL_I2CB 2362306a36Sopenharmony_ci 1 -- OUT1 2462306a36Sopenharmony_ci 2 -- OUT4 2562306a36Sopenharmony_ci 2662306a36Sopenharmony_ci - other parts: 2762306a36Sopenharmony_ci 0 -- OUT0_SEL_I2CB 2862306a36Sopenharmony_ci 1 -- OUT1 2962306a36Sopenharmony_ci 2 -- OUT2 3062306a36Sopenharmony_ci 3 -- OUT3 3162306a36Sopenharmony_ci 4 -- OUT4 3262306a36Sopenharmony_ci 3362306a36Sopenharmony_ci The idt,shutdown and idt,output-enable-active properties control the 3462306a36Sopenharmony_ci SH (en_global_shutdown) and SP bits of the Primary Source and Shutdown 3562306a36Sopenharmony_ci Register, respectively. Their behavior is summarized by the following 3662306a36Sopenharmony_ci table: 3762306a36Sopenharmony_ci 3862306a36Sopenharmony_ci SH SP Output when the SD/OE pin is Low/High 3962306a36Sopenharmony_ci == == ===================================== 4062306a36Sopenharmony_ci 0 0 Active/Inactive 4162306a36Sopenharmony_ci 0 1 Inactive/Active 4262306a36Sopenharmony_ci 1 0 Active/Shutdown 4362306a36Sopenharmony_ci 1 1 Inactive/Shutdown 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci The case where SH and SP are both 1 is likely not very interesting. 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_cimaintainers: 4862306a36Sopenharmony_ci - Luca Ceresoli <luca.ceresoli@bootlin.com> 4962306a36Sopenharmony_ci 5062306a36Sopenharmony_ciproperties: 5162306a36Sopenharmony_ci compatible: 5262306a36Sopenharmony_ci enum: 5362306a36Sopenharmony_ci - idt,5p49v5923 5462306a36Sopenharmony_ci - idt,5p49v5925 5562306a36Sopenharmony_ci - idt,5p49v5933 5662306a36Sopenharmony_ci - idt,5p49v5935 5762306a36Sopenharmony_ci - idt,5p49v60 5862306a36Sopenharmony_ci - idt,5p49v6901 5962306a36Sopenharmony_ci - idt,5p49v6965 6062306a36Sopenharmony_ci - idt,5p49v6975 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci reg: 6362306a36Sopenharmony_ci description: I2C device address 6462306a36Sopenharmony_ci enum: [ 0x68, 0x6a ] 6562306a36Sopenharmony_ci 6662306a36Sopenharmony_ci '#clock-cells': 6762306a36Sopenharmony_ci const: 1 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci clock-names: 7062306a36Sopenharmony_ci minItems: 1 7162306a36Sopenharmony_ci maxItems: 2 7262306a36Sopenharmony_ci items: 7362306a36Sopenharmony_ci enum: [ xin, clkin ] 7462306a36Sopenharmony_ci clocks: 7562306a36Sopenharmony_ci minItems: 1 7662306a36Sopenharmony_ci maxItems: 2 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci idt,xtal-load-femtofarads: 7962306a36Sopenharmony_ci minimum: 9000 8062306a36Sopenharmony_ci maximum: 22760 8162306a36Sopenharmony_ci description: Optional load capacitor for XTAL1 and XTAL2 8262306a36Sopenharmony_ci 8362306a36Sopenharmony_ci idt,shutdown: 8462306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 8562306a36Sopenharmony_ci enum: [0, 1] 8662306a36Sopenharmony_ci description: | 8762306a36Sopenharmony_ci If 1, this enables the shutdown functionality: the chip will be 8862306a36Sopenharmony_ci shut down if the SD/OE pin is driven high. If 0, this disables the 8962306a36Sopenharmony_ci shutdown functionality: the chip will never be shut down based on 9062306a36Sopenharmony_ci the value of the SD/OE pin. This property corresponds to the SH 9162306a36Sopenharmony_ci bit of the Primary Source and Shutdown Register. 9262306a36Sopenharmony_ci 9362306a36Sopenharmony_ci idt,output-enable-active: 9462306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 9562306a36Sopenharmony_ci enum: [0, 1] 9662306a36Sopenharmony_ci description: | 9762306a36Sopenharmony_ci If 1, this enables output when the SD/OE pin is high, and disables 9862306a36Sopenharmony_ci output when the SD/OE pin is low. If 0, this disables output when 9962306a36Sopenharmony_ci the SD/OE pin is high, and enables output when the SD/OE pin is 10062306a36Sopenharmony_ci low. This corresponds to the SP bit of the Primary Source and 10162306a36Sopenharmony_ci Shutdown Register. 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_cipatternProperties: 10462306a36Sopenharmony_ci "^OUT[1-4]$": 10562306a36Sopenharmony_ci type: object 10662306a36Sopenharmony_ci description: 10762306a36Sopenharmony_ci Description of one of the outputs (OUT1..OUT4). See "Clock1 Output 10862306a36Sopenharmony_ci Configuration" in the Versaclock 5/6/6E Family Register Description 10962306a36Sopenharmony_ci and Programming Guide. 11062306a36Sopenharmony_ci properties: 11162306a36Sopenharmony_ci idt,mode: 11262306a36Sopenharmony_ci description: 11362306a36Sopenharmony_ci The output drive mode. Values defined in dt-bindings/clock/versaclock.h 11462306a36Sopenharmony_ci $ref: /schemas/types.yaml#/definitions/uint32 11562306a36Sopenharmony_ci minimum: 0 11662306a36Sopenharmony_ci maximum: 6 11762306a36Sopenharmony_ci idt,voltage-microvolt: 11862306a36Sopenharmony_ci description: The output drive voltage. 11962306a36Sopenharmony_ci enum: [ 1800000, 2500000, 3300000 ] 12062306a36Sopenharmony_ci idt,slew-percent: 12162306a36Sopenharmony_ci description: The Slew rate control for CMOS single-ended. 12262306a36Sopenharmony_ci enum: [ 80, 85, 90, 100 ] 12362306a36Sopenharmony_ci additionalProperties: false 12462306a36Sopenharmony_ci 12562306a36Sopenharmony_cirequired: 12662306a36Sopenharmony_ci - compatible 12762306a36Sopenharmony_ci - reg 12862306a36Sopenharmony_ci - '#clock-cells' 12962306a36Sopenharmony_ci - idt,shutdown 13062306a36Sopenharmony_ci - idt,output-enable-active 13162306a36Sopenharmony_ci 13262306a36Sopenharmony_ciallOf: 13362306a36Sopenharmony_ci - if: 13462306a36Sopenharmony_ci properties: 13562306a36Sopenharmony_ci compatible: 13662306a36Sopenharmony_ci enum: 13762306a36Sopenharmony_ci - idt,5p49v5933 13862306a36Sopenharmony_ci - idt,5p49v5935 13962306a36Sopenharmony_ci - idt,5p49v6975 14062306a36Sopenharmony_ci then: 14162306a36Sopenharmony_ci # Devices with builtin crystal + optional external input 14262306a36Sopenharmony_ci properties: 14362306a36Sopenharmony_ci clock-names: 14462306a36Sopenharmony_ci const: clkin 14562306a36Sopenharmony_ci clocks: 14662306a36Sopenharmony_ci maxItems: 1 14762306a36Sopenharmony_ci else: 14862306a36Sopenharmony_ci # Devices without builtin crystal 14962306a36Sopenharmony_ci required: 15062306a36Sopenharmony_ci - clock-names 15162306a36Sopenharmony_ci - clocks 15262306a36Sopenharmony_ci 15362306a36Sopenharmony_ciadditionalProperties: false 15462306a36Sopenharmony_ci 15562306a36Sopenharmony_ciexamples: 15662306a36Sopenharmony_ci - | 15762306a36Sopenharmony_ci #include <dt-bindings/clock/versaclock.h> 15862306a36Sopenharmony_ci 15962306a36Sopenharmony_ci /* 25MHz reference crystal */ 16062306a36Sopenharmony_ci ref25: ref25m { 16162306a36Sopenharmony_ci compatible = "fixed-clock"; 16262306a36Sopenharmony_ci #clock-cells = <0>; 16362306a36Sopenharmony_ci clock-frequency = <25000000>; 16462306a36Sopenharmony_ci }; 16562306a36Sopenharmony_ci 16662306a36Sopenharmony_ci i2c@0 { 16762306a36Sopenharmony_ci reg = <0x0 0x100>; 16862306a36Sopenharmony_ci #address-cells = <1>; 16962306a36Sopenharmony_ci #size-cells = <0>; 17062306a36Sopenharmony_ci 17162306a36Sopenharmony_ci /* IDT 5P49V5923 I2C clock generator */ 17262306a36Sopenharmony_ci vc5: clock-generator@6a { 17362306a36Sopenharmony_ci compatible = "idt,5p49v5923"; 17462306a36Sopenharmony_ci reg = <0x6a>; 17562306a36Sopenharmony_ci #clock-cells = <1>; 17662306a36Sopenharmony_ci 17762306a36Sopenharmony_ci /* Connect XIN input to 25MHz reference */ 17862306a36Sopenharmony_ci clocks = <&ref25m>; 17962306a36Sopenharmony_ci clock-names = "xin"; 18062306a36Sopenharmony_ci 18162306a36Sopenharmony_ci /* Set the SD/OE pin's settings */ 18262306a36Sopenharmony_ci idt,shutdown = <0>; 18362306a36Sopenharmony_ci idt,output-enable-active = <0>; 18462306a36Sopenharmony_ci 18562306a36Sopenharmony_ci OUT1 { 18662306a36Sopenharmony_ci idt,mode = <VC5_CMOSD>; 18762306a36Sopenharmony_ci idt,voltage-microvolt = <1800000>; 18862306a36Sopenharmony_ci idt,slew-percent = <80>; 18962306a36Sopenharmony_ci }; 19062306a36Sopenharmony_ci 19162306a36Sopenharmony_ci OUT4 { 19262306a36Sopenharmony_ci idt,mode = <VC5_LVDS>; 19362306a36Sopenharmony_ci }; 19462306a36Sopenharmony_ci }; 19562306a36Sopenharmony_ci }; 19662306a36Sopenharmony_ci 19762306a36Sopenharmony_ci... 198