162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci%YAML 1.2
362306a36Sopenharmony_ci---
462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml#
562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml#
662306a36Sopenharmony_ci
762306a36Sopenharmony_cititle: Allwinner A80 MMC Configuration Clock
862306a36Sopenharmony_ci
962306a36Sopenharmony_cimaintainers:
1062306a36Sopenharmony_ci  - Chen-Yu Tsai <wens@csie.org>
1162306a36Sopenharmony_ci  - Maxime Ripard <mripard@kernel.org>
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_cideprecated: true
1462306a36Sopenharmony_ci
1562306a36Sopenharmony_cidescription: >
1662306a36Sopenharmony_ci  There is one clock/reset output per mmc controller. The number of
1762306a36Sopenharmony_ci  outputs is determined by the size of the address block, which is
1862306a36Sopenharmony_ci  related to the overall mmc block.
1962306a36Sopenharmony_ci
2062306a36Sopenharmony_ciproperties:
2162306a36Sopenharmony_ci  "#clock-cells":
2262306a36Sopenharmony_ci    const: 1
2362306a36Sopenharmony_ci    description: >
2462306a36Sopenharmony_ci      The additional ID argument passed to the clock shall refer to
2562306a36Sopenharmony_ci      the index of the output.
2662306a36Sopenharmony_ci
2762306a36Sopenharmony_ci  "#reset-cells":
2862306a36Sopenharmony_ci    const: 1
2962306a36Sopenharmony_ci
3062306a36Sopenharmony_ci  compatible:
3162306a36Sopenharmony_ci    const: allwinner,sun9i-a80-mmc-config-clk
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ci  reg:
3462306a36Sopenharmony_ci    maxItems: 1
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci  clocks:
3762306a36Sopenharmony_ci    maxItems: 1
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci  resets:
4062306a36Sopenharmony_ci    maxItems: 1
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci  clock-output-names:
4362306a36Sopenharmony_ci    maxItems: 4
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_cirequired:
4662306a36Sopenharmony_ci  - "#clock-cells"
4762306a36Sopenharmony_ci  - "#reset-cells"
4862306a36Sopenharmony_ci  - compatible
4962306a36Sopenharmony_ci  - reg
5062306a36Sopenharmony_ci  - clocks
5162306a36Sopenharmony_ci  - clock-output-names
5262306a36Sopenharmony_ci
5362306a36Sopenharmony_ciadditionalProperties: false
5462306a36Sopenharmony_ci
5562306a36Sopenharmony_ciexamples:
5662306a36Sopenharmony_ci  - |
5762306a36Sopenharmony_ci    clk@1c13000 {
5862306a36Sopenharmony_ci        #clock-cells = <1>;
5962306a36Sopenharmony_ci        #reset-cells = <1>;
6062306a36Sopenharmony_ci        compatible = "allwinner,sun9i-a80-mmc-config-clk";
6162306a36Sopenharmony_ci        reg = <0x01c13000 0x10>;
6262306a36Sopenharmony_ci        clocks = <&ahb0_gates 8>;
6362306a36Sopenharmony_ci        resets = <&ahb0_resets 8>;
6462306a36Sopenharmony_ci        clock-output-names = "mmc0_config", "mmc1_config",
6562306a36Sopenharmony_ci                             "mmc2_config", "mmc3_config";
6662306a36Sopenharmony_ci    };
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci...
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