162306a36Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 262306a36Sopenharmony_ci%YAML 1.2 362306a36Sopenharmony_ci--- 462306a36Sopenharmony_ci$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml# 562306a36Sopenharmony_ci$schema: http://devicetree.org/meta-schemas/core.yaml# 662306a36Sopenharmony_ci 762306a36Sopenharmony_cititle: Allwinner A10 Bus Gates Clock 862306a36Sopenharmony_ci 962306a36Sopenharmony_cimaintainers: 1062306a36Sopenharmony_ci - Chen-Yu Tsai <wens@csie.org> 1162306a36Sopenharmony_ci - Maxime Ripard <mripard@kernel.org> 1262306a36Sopenharmony_ci 1362306a36Sopenharmony_cideprecated: true 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciproperties: 1662306a36Sopenharmony_ci "#clock-cells": 1762306a36Sopenharmony_ci const: 1 1862306a36Sopenharmony_ci description: > 1962306a36Sopenharmony_ci This additional argument passed to that clock is the offset of 2062306a36Sopenharmony_ci the bit controlling this particular gate in the register. 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ci compatible: 2362306a36Sopenharmony_ci oneOf: 2462306a36Sopenharmony_ci - const: allwinner,sun4i-a10-gates-clk 2562306a36Sopenharmony_ci - const: allwinner,sun4i-a10-axi-gates-clk 2662306a36Sopenharmony_ci - const: allwinner,sun4i-a10-ahb-gates-clk 2762306a36Sopenharmony_ci - const: allwinner,sun5i-a10s-ahb-gates-clk 2862306a36Sopenharmony_ci - const: allwinner,sun5i-a13-ahb-gates-clk 2962306a36Sopenharmony_ci - const: allwinner,sun7i-a20-ahb-gates-clk 3062306a36Sopenharmony_ci - const: allwinner,sun6i-a31-ahb1-gates-clk 3162306a36Sopenharmony_ci - const: allwinner,sun8i-a23-ahb1-gates-clk 3262306a36Sopenharmony_ci - const: allwinner,sun9i-a80-ahb0-gates-clk 3362306a36Sopenharmony_ci - const: allwinner,sun9i-a80-ahb1-gates-clk 3462306a36Sopenharmony_ci - const: allwinner,sun9i-a80-ahb2-gates-clk 3562306a36Sopenharmony_ci - const: allwinner,sun4i-a10-apb0-gates-clk 3662306a36Sopenharmony_ci - const: allwinner,sun5i-a10s-apb0-gates-clk 3762306a36Sopenharmony_ci - const: allwinner,sun5i-a13-apb0-gates-clk 3862306a36Sopenharmony_ci - const: allwinner,sun7i-a20-apb0-gates-clk 3962306a36Sopenharmony_ci - const: allwinner,sun9i-a80-apb0-gates-clk 4062306a36Sopenharmony_ci - const: allwinner,sun8i-a83t-apb0-gates-clk 4162306a36Sopenharmony_ci - const: allwinner,sun4i-a10-apb1-gates-clk 4262306a36Sopenharmony_ci - const: allwinner,sun5i-a13-apb1-gates-clk 4362306a36Sopenharmony_ci - const: allwinner,sun5i-a10s-apb1-gates-clk 4462306a36Sopenharmony_ci - const: allwinner,sun6i-a31-apb1-gates-clk 4562306a36Sopenharmony_ci - const: allwinner,sun7i-a20-apb1-gates-clk 4662306a36Sopenharmony_ci - const: allwinner,sun8i-a23-apb1-gates-clk 4762306a36Sopenharmony_ci - const: allwinner,sun9i-a80-apb1-gates-clk 4862306a36Sopenharmony_ci - const: allwinner,sun6i-a31-apb2-gates-clk 4962306a36Sopenharmony_ci - const: allwinner,sun8i-a23-apb2-gates-clk 5062306a36Sopenharmony_ci - const: allwinner,sun8i-a83t-bus-gates-clk 5162306a36Sopenharmony_ci - const: allwinner,sun9i-a80-apbs-gates-clk 5262306a36Sopenharmony_ci - const: allwinner,sun4i-a10-dram-gates-clk 5362306a36Sopenharmony_ci 5462306a36Sopenharmony_ci - items: 5562306a36Sopenharmony_ci - const: allwinner,sun5i-a13-dram-gates-clk 5662306a36Sopenharmony_ci - const: allwinner,sun4i-a10-gates-clk 5762306a36Sopenharmony_ci 5862306a36Sopenharmony_ci - items: 5962306a36Sopenharmony_ci - const: allwinner,sun8i-h3-apb0-gates-clk 6062306a36Sopenharmony_ci - const: allwinner,sun4i-a10-gates-clk 6162306a36Sopenharmony_ci 6262306a36Sopenharmony_ci reg: 6362306a36Sopenharmony_ci maxItems: 1 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci clocks: 6662306a36Sopenharmony_ci maxItems: 1 6762306a36Sopenharmony_ci 6862306a36Sopenharmony_ci clock-indices: 6962306a36Sopenharmony_ci minItems: 1 7062306a36Sopenharmony_ci maxItems: 64 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci clock-output-names: 7362306a36Sopenharmony_ci minItems: 1 7462306a36Sopenharmony_ci maxItems: 64 7562306a36Sopenharmony_ci 7662306a36Sopenharmony_cirequired: 7762306a36Sopenharmony_ci - "#clock-cells" 7862306a36Sopenharmony_ci - compatible 7962306a36Sopenharmony_ci - reg 8062306a36Sopenharmony_ci - clocks 8162306a36Sopenharmony_ci - clock-indices 8262306a36Sopenharmony_ci - clock-output-names 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ciadditionalProperties: false 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ciexamples: 8762306a36Sopenharmony_ci - | 8862306a36Sopenharmony_ci clk@1c2005c { 8962306a36Sopenharmony_ci #clock-cells = <1>; 9062306a36Sopenharmony_ci compatible = "allwinner,sun4i-a10-axi-gates-clk"; 9162306a36Sopenharmony_ci reg = <0x01c2005c 0x4>; 9262306a36Sopenharmony_ci clocks = <&axi>; 9362306a36Sopenharmony_ci clock-indices = <0>; 9462306a36Sopenharmony_ci clock-output-names = "axi_dram"; 9562306a36Sopenharmony_ci }; 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci - | 9862306a36Sopenharmony_ci clk@1c20060 { 9962306a36Sopenharmony_ci #clock-cells = <1>; 10062306a36Sopenharmony_ci compatible = "allwinner,sun4i-a10-ahb-gates-clk"; 10162306a36Sopenharmony_ci reg = <0x01c20060 0x8>; 10262306a36Sopenharmony_ci clocks = <&ahb>; 10362306a36Sopenharmony_ci clock-indices = <0>, <1>, 10462306a36Sopenharmony_ci <2>, <3>, 10562306a36Sopenharmony_ci <4>, <5>, <6>, 10662306a36Sopenharmony_ci <7>, <8>, <9>, 10762306a36Sopenharmony_ci <10>, <11>, <12>, 10862306a36Sopenharmony_ci <13>, <14>, <16>, 10962306a36Sopenharmony_ci <17>, <18>, <20>, 11062306a36Sopenharmony_ci <21>, <22>, <23>, 11162306a36Sopenharmony_ci <24>, <25>, <26>, 11262306a36Sopenharmony_ci <32>, <33>, <34>, 11362306a36Sopenharmony_ci <35>, <36>, <37>, 11462306a36Sopenharmony_ci <40>, <41>, <43>, 11562306a36Sopenharmony_ci <44>, <45>, 11662306a36Sopenharmony_ci <46>, <47>, 11762306a36Sopenharmony_ci <50>, <52>; 11862306a36Sopenharmony_ci clock-output-names = "ahb_usb0", "ahb_ehci0", 11962306a36Sopenharmony_ci "ahb_ohci0", "ahb_ehci1", 12062306a36Sopenharmony_ci "ahb_ohci1", "ahb_ss", "ahb_dma", 12162306a36Sopenharmony_ci "ahb_bist", "ahb_mmc0", "ahb_mmc1", 12262306a36Sopenharmony_ci "ahb_mmc2", "ahb_mmc3", "ahb_ms", 12362306a36Sopenharmony_ci "ahb_nand", "ahb_sdram", "ahb_ace", 12462306a36Sopenharmony_ci "ahb_emac", "ahb_ts", "ahb_spi0", 12562306a36Sopenharmony_ci "ahb_spi1", "ahb_spi2", "ahb_spi3", 12662306a36Sopenharmony_ci "ahb_pata", "ahb_sata", "ahb_gps", 12762306a36Sopenharmony_ci "ahb_ve", "ahb_tvd", "ahb_tve0", 12862306a36Sopenharmony_ci "ahb_tve1", "ahb_lcd0", "ahb_lcd1", 12962306a36Sopenharmony_ci "ahb_csi0", "ahb_csi1", "ahb_hdmi", 13062306a36Sopenharmony_ci "ahb_de_be0", "ahb_de_be1", 13162306a36Sopenharmony_ci "ahb_de_fe0", "ahb_de_fe1", 13262306a36Sopenharmony_ci "ahb_mp", "ahb_mali400"; 13362306a36Sopenharmony_ci }; 13462306a36Sopenharmony_ci 13562306a36Sopenharmony_ci 13662306a36Sopenharmony_ci - | 13762306a36Sopenharmony_ci clk@1c20068 { 13862306a36Sopenharmony_ci #clock-cells = <1>; 13962306a36Sopenharmony_ci compatible = "allwinner,sun4i-a10-apb0-gates-clk"; 14062306a36Sopenharmony_ci reg = <0x01c20068 0x4>; 14162306a36Sopenharmony_ci clocks = <&apb0>; 14262306a36Sopenharmony_ci clock-indices = <0>, <1>, 14362306a36Sopenharmony_ci <2>, <3>, 14462306a36Sopenharmony_ci <5>, <6>, 14562306a36Sopenharmony_ci <7>, <10>; 14662306a36Sopenharmony_ci clock-output-names = "apb0_codec", "apb0_spdif", 14762306a36Sopenharmony_ci "apb0_ac97", "apb0_iis", 14862306a36Sopenharmony_ci "apb0_pio", "apb0_ir0", 14962306a36Sopenharmony_ci "apb0_ir1", "apb0_keypad"; 15062306a36Sopenharmony_ci }; 15162306a36Sopenharmony_ci 15262306a36Sopenharmony_ci... 153