162306a36Sopenharmony_ciDriver for ARM AXI Bus with Broadcom Plugins (bcma)
262306a36Sopenharmony_ci
362306a36Sopenharmony_ciRequired properties:
462306a36Sopenharmony_ci
562306a36Sopenharmony_ci- compatible : brcm,bus-axi
662306a36Sopenharmony_ci
762306a36Sopenharmony_ci- reg : iomem address range of chipcommon core
862306a36Sopenharmony_ci
962306a36Sopenharmony_ciThe cores on the AXI bus are automatically detected by bcma with the
1062306a36Sopenharmony_cimemory ranges they are using and they get registered afterwards.
1162306a36Sopenharmony_ciAutomatic detection of the IRQ number is not working on
1262306a36Sopenharmony_ciBCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
1362306a36Sopenharmony_cithem manually through device tree. Use an interrupt-map to specify the
1462306a36Sopenharmony_ciIRQ used by the devices on the bus. The first address is just an index,
1562306a36Sopenharmony_cibecause we do not have any special register.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciThe top-level axi bus may contain children representing attached cores
1862306a36Sopenharmony_ci(devices). This is needed since some hardware details can't be auto
1962306a36Sopenharmony_cidetected (e.g. IRQ numbers). Also some of the cores may be responsible
2062306a36Sopenharmony_cifor extra things, e.g. ChipCommon providing access to the GPIO chip.
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciExample:
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ci	axi@18000000 {
2562306a36Sopenharmony_ci		compatible = "brcm,bus-axi";
2662306a36Sopenharmony_ci		reg = <0x18000000 0x1000>;
2762306a36Sopenharmony_ci		ranges = <0x00000000 0x18000000 0x00100000>;
2862306a36Sopenharmony_ci		#address-cells = <1>;
2962306a36Sopenharmony_ci		#size-cells = <1>;
3062306a36Sopenharmony_ci		#interrupt-cells = <1>;
3162306a36Sopenharmony_ci		interrupt-map-mask = <0x000fffff 0xffff>;
3262306a36Sopenharmony_ci		interrupt-map =
3362306a36Sopenharmony_ci			/* Ethernet Controller 0 */
3462306a36Sopenharmony_ci			<0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci			/* Ethernet Controller 1 */
3762306a36Sopenharmony_ci			<0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
3862306a36Sopenharmony_ci
3962306a36Sopenharmony_ci			/* PCIe Controller 0 */
4062306a36Sopenharmony_ci			<0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
4162306a36Sopenharmony_ci			<0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
4262306a36Sopenharmony_ci			<0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
4362306a36Sopenharmony_ci			<0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
4462306a36Sopenharmony_ci			<0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
4562306a36Sopenharmony_ci			<0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci		chipcommon {
4862306a36Sopenharmony_ci			reg = <0x00000000 0x1000>;
4962306a36Sopenharmony_ci
5062306a36Sopenharmony_ci			gpio-controller;
5162306a36Sopenharmony_ci			#gpio-cells = <2>;
5262306a36Sopenharmony_ci		};
5362306a36Sopenharmony_ci	};
54