162306a36Sopenharmony_ciST-Ericsson Ux500 boards
262306a36Sopenharmony_ci------------------------
362306a36Sopenharmony_ci
462306a36Sopenharmony_ciRequired properties (in root node) one of these:
562306a36Sopenharmony_ci	compatible = "st-ericsson,mop500" (legacy)
662306a36Sopenharmony_ci	compatible = "st-ericsson,u8500"
762306a36Sopenharmony_ci
862306a36Sopenharmony_ciRequired node (under root node):
962306a36Sopenharmony_ci
1062306a36Sopenharmony_cisoc: represents the system-on-chip and contains the chip
1162306a36Sopenharmony_ciperipherals
1262306a36Sopenharmony_ci
1362306a36Sopenharmony_ciRequired property of soc node, one of these:
1462306a36Sopenharmony_ci	compatible = "stericsson,db8500"
1562306a36Sopenharmony_ci
1662306a36Sopenharmony_ciRequired subnodes under soc node:
1762306a36Sopenharmony_ci
1862306a36Sopenharmony_cibackupram: (used for CPU spin tables and for storing data
1962306a36Sopenharmony_ciduring retention, system won't boot without this):
2062306a36Sopenharmony_ci	compatible = "ste,dbx500-backupram"
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciscu:
2362306a36Sopenharmony_ci	see binding for arm/arm,scu.yaml
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_ciinterrupt-controller:
2662306a36Sopenharmony_ci	see binding for interrupt-controller/arm,gic.txt
2762306a36Sopenharmony_ci
2862306a36Sopenharmony_citimer:
2962306a36Sopenharmony_ci	see binding for timer/arm,twd-timer.yaml
3062306a36Sopenharmony_ci
3162306a36Sopenharmony_ciclocks:
3262306a36Sopenharmony_ci	see binding for clocks/ux500.txt
3362306a36Sopenharmony_ci
3462306a36Sopenharmony_ciExample:
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ci/dts-v1/;
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci/ {
3962306a36Sopenharmony_ci        model = "ST-Ericsson HREF (pre-v60) and ST UIB";
4062306a36Sopenharmony_ci        compatible = "st-ericsson,mop500", "st-ericsson,u8500";
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ci        soc {
4362306a36Sopenharmony_ci		#address-cells = <1>;
4462306a36Sopenharmony_ci		#size-cells = <1>;
4562306a36Sopenharmony_ci		compatible = "stericsson,db8500";
4662306a36Sopenharmony_ci		interrupt-parent = <&intc>;
4762306a36Sopenharmony_ci		ranges;
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ci		backupram@80150000 {
5062306a36Sopenharmony_ci			compatible = "ste,dbx500-backupram";
5162306a36Sopenharmony_ci			reg = <0x80150000 0x2000>;
5262306a36Sopenharmony_ci		};
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ci		intc: interrupt-controller@a0411000 {
5562306a36Sopenharmony_ci			compatible = "arm,cortex-a9-gic";
5662306a36Sopenharmony_ci			#interrupt-cells = <3>;
5762306a36Sopenharmony_ci			#address-cells = <1>;
5862306a36Sopenharmony_ci			interrupt-controller;
5962306a36Sopenharmony_ci			reg = <0xa0411000 0x1000>,
6062306a36Sopenharmony_ci			      <0xa0410100 0x100>;
6162306a36Sopenharmony_ci		};
6262306a36Sopenharmony_ci
6362306a36Sopenharmony_ci		scu@a0410000 {
6462306a36Sopenharmony_ci			compatible = "arm,cortex-a9-scu";
6562306a36Sopenharmony_ci			reg = <0xa0410000 0x100>;
6662306a36Sopenharmony_ci		};
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ci		timer@a0410600 {
6962306a36Sopenharmony_ci			compatible = "arm,cortex-a9-twd-timer";
7062306a36Sopenharmony_ci			reg = <0xa0410600 0x20>;
7162306a36Sopenharmony_ci			interrupts = <1 13 0x304>; /* IRQ level high per-CPU */
7262306a36Sopenharmony_ci			clocks = <&smp_twd_clk>;
7362306a36Sopenharmony_ci		};
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci		clocks {
7662306a36Sopenharmony_ci			compatible = "stericsson,u8500-clks";
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_ci			smp_twd_clk: smp-twd-clock {
7962306a36Sopenharmony_ci				#clock-cells = <0>;
8062306a36Sopenharmony_ci			};
8162306a36Sopenharmony_ci		};
8262306a36Sopenharmony_ci        };
8362306a36Sopenharmony_ci};
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