162306a36Sopenharmony_ciMediatek vencsys controller 262306a36Sopenharmony_ci============================ 362306a36Sopenharmony_ci 462306a36Sopenharmony_ciThe Mediatek vencsys controller provides various clocks to the system. 562306a36Sopenharmony_ci 662306a36Sopenharmony_ciRequired Properties: 762306a36Sopenharmony_ci 862306a36Sopenharmony_ci- compatible: Should be one of: 962306a36Sopenharmony_ci - "mediatek,mt2712-vencsys", "syscon" 1062306a36Sopenharmony_ci - "mediatek,mt6779-vencsys", "syscon" 1162306a36Sopenharmony_ci - "mediatek,mt6797-vencsys", "syscon" 1262306a36Sopenharmony_ci - "mediatek,mt8173-vencsys", "syscon" 1362306a36Sopenharmony_ci - "mediatek,mt8183-vencsys", "syscon" 1462306a36Sopenharmony_ci- #clock-cells: Must be 1 1562306a36Sopenharmony_ci 1662306a36Sopenharmony_ciThe vencsys controller uses the common clk binding from 1762306a36Sopenharmony_ciDocumentation/devicetree/bindings/clock/clock-bindings.txt 1862306a36Sopenharmony_ciThe available clocks are defined in dt-bindings/clock/mt*-clk.h. 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ciExample: 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_civencsys: clock-controller@18000000 { 2362306a36Sopenharmony_ci compatible = "mediatek,mt8173-vencsys", "syscon"; 2462306a36Sopenharmony_ci reg = <0 0x18000000 0 0x1000>; 2562306a36Sopenharmony_ci #clock-cells = <1>; 2662306a36Sopenharmony_ci}; 27