162306a36Sopenharmony_ciMediatek vdecsys controller
262306a36Sopenharmony_ci============================
362306a36Sopenharmony_ci
462306a36Sopenharmony_ciThe Mediatek vdecsys controller provides various clocks to the system.
562306a36Sopenharmony_ci
662306a36Sopenharmony_ciRequired Properties:
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci- compatible: Should be one of:
962306a36Sopenharmony_ci	- "mediatek,mt2701-vdecsys", "syscon"
1062306a36Sopenharmony_ci	- "mediatek,mt2712-vdecsys", "syscon"
1162306a36Sopenharmony_ci	- "mediatek,mt6779-vdecsys", "syscon"
1262306a36Sopenharmony_ci	- "mediatek,mt6797-vdecsys", "syscon"
1362306a36Sopenharmony_ci	- "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
1462306a36Sopenharmony_ci	- "mediatek,mt8167-vdecsys", "syscon"
1562306a36Sopenharmony_ci	- "mediatek,mt8173-vdecsys", "syscon"
1662306a36Sopenharmony_ci	- "mediatek,mt8183-vdecsys", "syscon"
1762306a36Sopenharmony_ci- #clock-cells: Must be 1
1862306a36Sopenharmony_ci
1962306a36Sopenharmony_ciThe vdecsys controller uses the common clk binding from
2062306a36Sopenharmony_ciDocumentation/devicetree/bindings/clock/clock-bindings.txt
2162306a36Sopenharmony_ciThe available clocks are defined in dt-bindings/clock/mt*-clk.h.
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciExample:
2462306a36Sopenharmony_ci
2562306a36Sopenharmony_civdecsys: clock-controller@16000000 {
2662306a36Sopenharmony_ci	compatible = "mediatek,mt8173-vdecsys", "syscon";
2762306a36Sopenharmony_ci	reg = <0 0x16000000 0 0x1000>;
2862306a36Sopenharmony_ci	#clock-cells = <1>;
2962306a36Sopenharmony_ci};
30